Datasheet

1999-2013 Microchip Technology Inc. Preliminary DS41124D-page 21
PIC16C745/765
TABLE 4-2: USB DUAL PORT RAM
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on:
POR,
BOR
Value on all
other resets
(1)
1A0h BD0OST
UOWN
UOWN
DATA0/1
DATA0/1
PID3
PID2
PID1
DTS
PID0
BSTALL
xxxx xxxx uuuu uuuu
1A1h BD0OBC
Byte Count xxxx xxxx uuuu uuuu
1A2h BD0OAL Buffer Address Low xxxx xxxx uuuu uuuu
1A3h
Reserved
1A4h BD0IST
UOWN
UOWN
DATA0/1
DATA0/1
PID3
PID2
PID1
DTS
PID0
BSTALL
xxxx xxxx uuuu uuuu
1A5h BD0IBC
Byte Count xxxx xxxx uuuu uuuu
1A6h BD0IAL Buffer Address Low xxxx xxxx uuuu uuuu
1A7h
Reserved
1A8h BD1OST
UOWN
UOWN
DATA0/1
DATA0/1
PID3
PID2
PID1
DTS
PID0
BSTALL
xxxx xxxx uuuu uuuu
1A9h BD1OBC
Byte Count xxxx xxxx uuuu uuuu
1AAh BD1OAL Buffer Address Low xxxx xxxx uuuu uuuu
1ABh
Reserved
1ACh BD1IST
UOWN
UOWN
DATA0/1
DATA0/1
PID3
PID2
PID1
DTS
PID0
BSTALL
xxxx xxxx uuuu uuuu
1ADh BD1IBC
Byte Count xxxx xxxx uuuu uuuu
1AEh BD1IAL Buffer Address Low xxxx xxxx uuuu uuuu
1AFh
Reserved
1B0h BD2OST
UOWN
UOWN
DATA0/1
DATA0/1
PID3
PID2
PID1
DTS
PID0
BSTALL
xxxx xxxx uuuu uuuu
1B1h BD2OBC
Byte Count xxxx xxxx uuuu uuuu
1B2h BD2OAL Buffer Address Low xxxx xxxx uuuu uuuu
1B3h
Reserved
1B4h BD2IST
UOWN
UOWN
DATA0/1
DATA0/1
PID3
PID2
PID1
DTS
PID0
BSTALL
xxxx xxxx uuuu uuuu
1B5h BD2IBC
Byte Count xxxx xxxx uuuu uuuu
1B6h BD2IAL Buffer Address Low xxxx xxxx uuuu uuuu
1B7h
Reserved
1B8h-
1DFh
40 byte USB Buffer xxxx xxxx uuuu uuuu
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented read as '0'.
Shaded locations are unimplemented, read as ‘0’.
Note 1: Other (non power-up) RESETS include external RESET through MCLR and Watchdog Timer Reset.