Datasheet

PIC16C745/765
DS41124D-page 160 Preliminary  1999-2013 Microchip Technology Inc.
USART Synchronous Transmission
(Master/Slave) ......................................................... 140
Watchdog Timer (WDT)
........................................... 136
TMR0
................................................................................. 20
TMR0 Register
.................................................................. 17
TMR1CS bit
....................................................................... 45
TMR1H
.............................................................................. 20
TMR1H Register
................................................................ 17
TMR1L
............................................................................... 20
TMR1L Register
................................................................ 17
TMR1ON bit
....................................................................... 45
TMR2
................................................................................. 20
TMR2 Register
.................................................................. 17
TMR2ON bit
....................................................................... 49
TO
bit ................................................................................. 22
TOUTPS0 bit
..................................................................... 49
TOUTPS1 bit
..................................................................... 49
TOUTPS2 bit
..................................................................... 49
TOUTPS3 bit
..................................................................... 49
TRISA Register
...........................................................18, 31
TRISB Register
...........................................................18, 33
TRISC Register
.......................................................... 18, 35
TRISD Register
.......................................................... 18, 37
TRISE Register
.................................................... 18, 38, 39
TXREG
.............................................................................. 19
TXSTA Register
................................................................. 77
U
Universal Synchronous Asynchronous
Receiver Transmitter (USART)
..........................................77
USART
Asynchronous Mode
..................................................81
Asynchronous Receiver
............................................. 83
Asynchronous Reception
........................................... 84
Asynchronous Transmitter
......................................... 81
Baud Rate Generator (BRG)
..................................... 79
Receive Block Diagram
.............................................83
Sampling
.................................................................... 79
Synchronous Master Mode
........................................85
Timing Diagram, Synchronous Receive
.......... 140
Timing Diagram, Synchronous Transmission
.. 140
Synchronous Master Reception
................................87
Synchronous Master Transmission
........................... 85
Synchronous Slave Mode
.......................................... 89
Synchronous Slave Reception
.................................. 89
Synchronous Slave Transmit
..................................... 89
Transmit Block Diagram
............................................81
USB
.......................................................21, 58, 60, 61, 62
USB Address Register
....................................................... 66
USB Control Register
........................................................65
USB Endpoint Control Register
......................................... 67
UV Erasable Devices
........................................................... 7
W
W Register ...................................................................... 109
Wake-up from SLEEP
..................................................... 111
Watchdog Timer (WDT)
......................... 99, 101, 104, 110
Timing Diagram
....................................................... 136
WDT
................................................................................ 104
Block Diagram
......................................................... 110
Period
...................................................................... 110
Programming Considerations
.................................. 110
Timeout
................................................................... 105
WR
pin .............................................................................. 40
WWW, On-Line Support
...................................................... 3
Z
Z bit ................................................................................... 22