Datasheet

PIC16C745/765
DS41124D-page 16 Preliminary 1999-2013 Microchip Technology Inc.
FIGURE 4-2: DATA MEMORY MAP FOR PIC16C745/765
Bank 0 File
Address
Bank 1 File
Address
Bank 2 File
Address
Bank 3 File
Address
Indirect addr.(*) 00h Indirect addr.(*) 80h Indirect addr.(*) 100h Indirect addr.(*) 180h
TMR0 01h OPTION_REG 81h TMR0 101h OPTION_REG 181h
PCL 02h PCL 82h PCL 102h PCL 182h
STATUS 03h STATUS 83h STATUS 103h STATUS 183h
FSR 04h FSR 84h FSR 104h FSR 184h
PORTA 05h TRISA 85h
105h 185h
PORTB 06h TRISB 86h PORTB 106h TRISB 186h
PORTC 07h TRISC 87h
107h 187h
PORTD
(2)
08h
TRISD
(2)
88h 108h 188h
PORTE
(2)
09h
TRISE
(2)
89h 109h 189h
PCLATH 0Ah PCLATH 8Ah PCLATH 10Ah PCLATH 18Ah
INTCON 0Bh INTCON 8Bh INTCON 10Bh INTCON 18Bh
PIR1 0Ch PIE1 8Ch
10Ch 18Ch
PIR2 0Dh PIE2 8Dh
10Dh 18Dh
TMR1L 0Eh PCON 8Eh
10Eh 18Eh
TMR1H 0Fh
8Fh 10Fh 18Fh
T1CON 10h
90h 110h UIR 190h
TMR2 11h
91h 111h UIE 191h
T2CON 12h PR2 92h
112h UEIR 192h
13h 93h 113h UEIE 193h
14h 94h 114h USTAT 194h
CCPR1L 15h
95h 115h UCTRL 195h
CCPR1H 16h
96h 116h UADDR 196h
CCP1CON 17h
97h 117h
USWSTAT
(1)
197h
RCSTA 18h TXSTA 98h
118h UEP0 198h
TXREG 19h SPBRG 99h
119h UEP1 199h
RCREG 1Ah
9Ah 11Ah UEP2 19Ah
CCPR2L 1Bh
9Bh 11Bh
19Bh
(1)
CCPR2H 1Ch 9Ch 11Ch
19Ch
(1)
CCP2CON 1Dh 9Dh 11Dh
19Dh
(1)
ADRES 1Eh 9Eh 11Eh
19Eh
(1)
ADCON0 1Fh ADCON1 9Fh 11Fh
19Fh
(1)
General
Purpose
Register
96 Bytes
20h General
Purpose
Register
80 Bytes
A0h General
Purpose
Register
80 Bytes
120h USB Dual Port
Memory
64 Bytes
1A0h
1DFh
1E0h
EFh 16Fh 1EFh
accesses
70h-7Fh
F0h accesses
70h-7Fh
170h accesses
70h-7Fh
1F0h
7Fh FFh 17Fh 1FFh
Unimplemented data memory locations, read as ‘0’.
*Not a physical register.
Note 1: Reserved registers may contain USB state information.
2: Parallel slave ports (PORTD and PORTE) not implemented on PIC16C745; always maintain these bits clear.