Datasheet

 1999-2013 Microchip Technology Inc. Preliminary DS41124D-page 157
PIC16C745/765
INDEX
A
A/D
ADCON0 Register
..................................................... 91
Analog Input Model Block Diagram
........................... 95
Analog-to-Digital Converter
....................................... 91
Block Diagram
........................................................... 94
Configuring Analog Port Pins
.................................... 96
Configuring the Interrupt
............................................ 94
Configuring the Module
............................................. 94
Conversion Clock
...................................................... 96
Conversions
.............................................................. 96
Converter Characteristics
........................................ 141
Effects of a Reset
...................................................... 96
Faster Conversion - Lower Resolution Tradeoff
........ 96
Internal Sampling Switch (Rss) Impedance ................ 95
Operation During Sleep
............................................. 96
Sampling Requirements
............................................ 95
Source Impedance
.................................................... 95
Timing Diagram
....................................................... 142
Using the CCP Trigger
.............................................. 97
Absolute Maximum Ratings
............................................. 127
ADRES Register
......................................................... 17, 91
Application Notes
AN552 (Implementing Wake-up on Key Strokes
Using PIC16CXXX)
................................................... 33
AN556 (Table Reading Using PIC16CXX
................. 29
AN607, Power-up Trouble Shooting
........................ 103
Architecture
Overview
..................................................................... 9
Assembler
MPASM Assembler
................................................. 121
B
Baud Rate Formula ........................................................... 79
Block Diagrams
A/D
............................................................................ 94
Analog Input Model
................................................... 95
Capture
...................................................................... 53
Compare
.................................................................... 54
On-Chip Reset Circuit
............................................. 102
PORTC
...................................................................... 35
PORTD (In I/O Port Mode)
........................................ 37
PORTD and PORTE as a Parallel Slave Port
........... 40
PORTE (In I/O Port Mode)
........................................ 38
PWM
.......................................................................... 54
RA4/T0CKI Pin
.......................................................... 31
RB Port Pins
.............................................................. 33
RB Port Pins
.............................................................. 33
Timer0/WDT Prescaler
.............................................. 43
Timer2
....................................................................... 49
USART Receive
........................................................ 83
USART Transmit
....................................................... 81
Watchdog Timer
...................................................... 110
BOR
bit ............................................................................ 103
BRGH bit
........................................................................... 79
Brown-out Reset (BOR)
Timing Diagram
....................................................... 136
Buffer Descriptor Table
...................................................... 68
C
C bit ................................................................................... 22
Capture/Compare/PWM
Capture
Block Diagram
................................................... 53
CCP1CON Register
.......................................... 52
CCP1IF
............................................................. 53
Mode
................................................................. 53
Prescaler
........................................................... 53
CCP Timer Resources
.............................................. 51
Compare
Block Diagram
................................................... 54
Mode
................................................................. 54
Software Interrupt Mode
................................... 54
Special Event Trigger
........................................ 54
Special Trigger Output of CCP1
....................... 54
Special Trigger Output of CCP2
....................... 54
Interaction of Two CCP Modules
.............................. 51
Section
...................................................................... 51
Special Event Trigger and A/D Conversions
............. 54
Capture/Compare/PWM (CCP)
PWM Block Diagram
................................................. 54
PWM Mode
............................................................... 54
Timing Diagram
....................................................... 138
CCP1CON
......................................................................... 19
CCP2CON
......................................................................... 19
CCPR1H Register
............................................... 17, 19, 51
CCPR1L Register
....................................................... 19, 51
CCPR2H Register
...................................................... 17, 19
CCPR2L Register
....................................................... 17, 19
Clocking Scheme
.............................................................. 13
Code Examples
Call of a Subroutine in Page 1 from Page 0
.............. 29
Changing Prescaler (Timer0 to WDT)
....................... 44
Indirect Addressing
................................................... 30
Initializing PORTA
..................................................... 31
Code Protection
....................................................... 99, 112
Computed GOTO
.............................................................. 29
Configuration Bits
.............................................................. 99
Control
............................................................................... 60
CREN bit
........................................................................... 78
CS
pin ............................................................................... 40
D
DC bit ................................................................................ 22
DC Characteristics
................................................. 129, 130
Development Support
................................................ 5, 121
Direct Addressing
.............................................................. 30
E
EC Oscillator ................................................................... 104
Electrical Characteristics
................................................. 127
Endpoint
............................................................................ 71
Errata
.................................................................................. 3
Error
.................................................................................. 63
F
FERR bit ............................................................................ 78
FSR Register
................................................ 17, 18, 20, 30
G
General Description ............................................................ 5
GIE bit
............................................................................. 107