Datasheet

PIC16C745/765
DS41124D-page 138 Preliminary  1999-2013 Microchip Technology Inc.
FIGURE 16-9: CAPTURE/COMPARE/PWM TIMINGS (CCP1 AND CCP2)
TABLE 16-6: CAPTURE/COMPARE/PWM REQUIREMENTS (CCP1 AND CCP2)
Note: Refer to Figure 16-2 for load conditions.
CCPx
(Capture Mode)
50 51
52
CCPx
53
54
(Compare or PWM Mode)
Param
No.
Sym Characteristic Min Typ† Max Units Conditions
50* T
CCL CCP1 and CCP2
input low time
No Prescaler 0.5 TCY + 20 — — ns
With Prescaler 10 — — ns
51* T
CCH CCP1 and CCP2
input high time
No Prescaler 0.5 TCY + 20 — — ns
With Prescaler 10 — — ns
52* T
CCP CCP1 and CCP2 input period 3 TCY + 40
N
— — ns N = prescale
value (1,4, or 16)
53* T
CCR CCP1 and CCP2 output rise time — 10 25 ns
54* T
CCF CCP1 and CCP2 output fall time — 10 25 ns
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.