Datasheet

PIC16C745/765
DS41124D-page 136 Preliminary  1999-2013 Microchip Technology Inc.
FIGURE 16-6: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER TIMING
FIGURE 16-7: BROWN-OUT RESET TIMING
TABLE 16-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER,
AND BROWN-OUT RESET REQUIREMENTS
Param No. Sym Characteristic Min Typ† Max Units Conditions
30 T
MCLMCLR Pulse Width (low) 2 — — sVDD = 5V, -40°C to +85°C
31* T
WDT Watchdog Timer Time-out
Period (No Prescaler)
71833msVDD = 5V, -40°C to +85°C
32 T
OST Oscillation Start-up Timer Period — 1024 TOSC ——TOSC = OSC1 period
33* T
PWRT Power-up Timer Period 28 72 132 ms VDD = 5V, -40°C to +85°C
34 T
IOZ I/O Hi-impedance from MCLR
Low or WDT Reset
——2.1s
35 T
BOR Brown-out Reset Pulse Width 100 — — sVDD  BVDD (D005)
36 T
PLLRT PLL Settling Time Period — 1.4 — ms TOSC = OSC1 period
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.
VDD
MCLR
Internal
POR
PWRT
Time-out
OSC
Time-out
Internal
Reset
Watchdog
Timer
Reset
33
32
30
31
34
I/O Pins
34
Note: Refer to Figure 16-2 for load conditions.
VDD
BVDD
35