Datasheet

PIC16C745/765
DS41124D-page 10 Preliminary  1999-2013 Microchip Technology Inc.
FIGURE 3-1: PIC16C745/765 BLOCK DIAGRAM
13
Data Bus
8
14
Program
Bus
Instruction reg
Program Counter
8 Level Stack
(13 bit)
Direct Addr
7
RAM Addr(1)
9
Addr MUX
Indirect
Addr
FSR reg
STATUS reg
MUX
ALU
W reg
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Instruction
Decode &
Control
Timing
Generation
OSC1/
OSC2/
MCLR
VDD, VSS
PORTA
PORTB
PORTC
PORTD
PORTE
RA4/T0CKI
RA5/AN4
RB0/INT
RB<7:1>
RC0/T1OSO/T1CKI
RC1/T1OSI/CCP2
RC2/CCP1
V
USB
D-
D+
RC6/TX/CK
RC7/RX/DT
RD3:0/PSP3:0
(2)
RE0/AN5/RD
(2)
RE1/AN6/WR
(2)
8
8
Brown-out
Reset
Note 1: Higher order bits are from the STATUS register.
2: Not available on PIC16C745.
USART
CCP1
8-bit A/DTimer0 Timer1 Timer2
RA3/AN3/VREF
RA2/AN2
RA1/AN1
RA0/AN0
Parallel Slave Port
(2)
8
3
RD4/PSP4
(2)
RD5/PSP5
(2)
RD6/PSP6
(2)
RD7/PSP7
(2)
USB
CLKOUT
CLKIN
CCP2
XCVR
RAM
File
Registers
256 x 8
Dual Port
EPROM
Program
Memory
8K x 14
RAM
64 x 8
x4 PLL
RE2/AN7/CS
(2)