Information

 2001 Microchip Technology Inc. DS80088A-page 3
PIC16C73A
7. Module: Timer1
The Timer1 value may unexpectedly increment if
either the TMR1H, or the TMR1L register is writ-
ten. If Timer1 is ON and then turned OFF, perform-
ing any write instruction with TMR1H as the
destination, may cause TMR1L to increment.
EXAMPLE 2: TMR1L INCREMENT
(CASE 1)
EXAMPLE 3: TMR1L INCREMENT
(CASE 2)
If Timer1 is ON and then turned OFF when
TMR1H:TMR1L = xx:FF, performing any write
instruction with TMR1L as the destination may
cause TMR1H to increment.
EXAMPLE 4: TMR1H INCREMENT
Work around
To preserve Timer1 register values:
a) Read Timer1 register values into “shadow”
registers.
b) Perform any write instruction(s) on the
shadow registers.
c) Write the shadow register values back into
the Timer1 registers.
8. Module: USART
When the USART (SCI) is configured in Asynchro-
nous mode with the BRGH bit set, a high number
of receive errors may be experienced. For asyn-
chronous receive operations, it is recommended
that the USART be configured with the BRGH bit
cleared.
BSF T1CON, TMR1ON
:
BCF T1CON, TMR1ON
MOVF TMR1H, 1
TMR1 value before MOVF instruction:
TMR1H:TMR1L = 3F:00
TMR1 value after MOVF instruction:
TMR1H:TMR1L = 3F:01
BSF T1CON, TMR1ON
:
BCF T1CON, TMR1ON
MOVF TMR1H, 1
TMR1 value before MOVF instruction:
TMR1H:TMR1L = FF:FF
TMR1 value after MOVF instruction:
TMR1H:TMR1L = FF:00
BSF T1CON, TMR1ON
BCF T1CON, TMR1ON
CLRF TMR1L
TMR1 value before CLRF instruction:
TMR1H:TMR1L = FF:FF
TMR1 value after CLRF instruction:
TMR1H:TMR1L = 00:00
(TMR1IF is not set.)