Datasheet

PIC16C7X
DS30390E-page 194  1997 Microchip Technology Inc.
Applicable Devices 72 73 73A 74 74A 76 77
FIGURE 18-7: PARALLEL SLAVE PORT TIMING (PIC16C74)
TABLE 18-7: PARALLEL SLAVE PORT REQUIREMENTS (PIC16C74)
Parameter
No.
Sym Characteristic Min Typ† Max Units Conditions
62
TdtV2wrH Data in valid before WR↑ or CS↑ (setup time) 20 — — ns
63* TwrH2dtI WR↑ or CS↑ to data–in invalid (hold time) PIC16C74 20 — — ns
PIC16LC74 35 — — ns
64 TrdL2dtV RD↓ and CS↓ to data–out valid — — 80 ns
65 TrdH2dtI RD↑ or CS↓ to data–out invalid 10 — 30 ns
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note: Refer to Figure 18-1 for load conditions
RE2/CS
RE0/RD
RE1/WR
RD7:RD0
62
63
64
65