Datasheet

 1997 Microchip Technology Inc. DS30390E-page 133
PIC16C7X
14.3 Reset
The PIC16CXX differentiates between various kinds of
reset:
• Power-on Reset (POR)
• MCLR
reset during normal operation
• MCLR
reset during SLEEP
• WDT Reset (normal operation)
• Brown-out Reset (BOR) (PIC16C72/73A/74A/76/
77)
Some registers are not affected in any reset condition;
their status is unknown on POR and unchanged in any
other reset. Most other registers are reset to a “reset
state” on Power-on Reset (POR), on the MCLR
and
WDT Reset, on MCLR
reset during SLEEP, and Brown-
out Reset (BOR). They are not affected by a WDT
Wake-up, which is viewed as the resumption of normal
operation. The T
O and PD bits are set or cleared differ-
ently in different reset situations as indicated in
Table 14-5 and Table 14-6. These bits are used in soft-
ware to determine the nature of the reset. See
Table 14-8 for a full description of reset states of all reg-
isters.
Applicable Devices
72
73 73A 74 74A 76 77
A simplified block diagram of the on-chip reset circuit is
shown in Figure 14-8.
The PIC16C72/73A/74A/76/77 have a MCLR
noise fil-
ter in the MCLR
reset path. The filter will detect and
ignore small pulses.
It should be noted that a WDT Reset
does not drive
MCLR
pin low.
FIGURE 14-8: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
S
R
Q
External
Reset
MCLR
VDD
OSC1
WDT
Module
V
DD rise
detect
OST/PWRT
On-chip
RC OSC
WDT
Time-out
Power-on Reset
OST
10-bit Ripple counter
PWRT
Chip_Reset
10-bit Ripple counter
Reset
Enable OST
Enable PWRT
SLEEP
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
2: Brown-out Reset is implemented on the PIC16C72/73A/74A/76/77.
3: See Table 14-3 and Table 14-4 for time-out situations.
Brown-out
Reset
BODEN
(1)
(2)
(3)