Datasheet

 1997 Microchip Technology Inc. DS30390E-page 113
PIC16C7X
FIGURE 12-14: SYNCHRONOUS RECEPTION (MASTER MODE, SREN)
CREN bit
RC7/RX/DT pin
RC6/TX/CK pin
Write to
bit SREN
SREN bit
RCIF bit
(interrupt)
Read
RXREG
Note: Timing diagram demonstrates SYNC master mode with bit SREN = '1' and bit BRG = '0'.
Q3 Q4Q1 Q2Q3 Q4Q1 Q2 Q3Q4Q2 Q1 Q2Q3 Q4Q1 Q2 Q3Q4 Q1 Q2Q3 Q4Q1 Q2 Q3Q4 Q1Q2 Q3Q4Q1 Q2Q3 Q4 Q1 Q2Q3 Q4
'0'
bit0 bit1 bit2 bit3 bit4 bit5 bit6 bit7
'0'
Q1 Q2Q3 Q4