Datasheet
PIC16C62B/72A
DS35008C-page 84 Preliminary 1998-2013 Microchip Technology Inc.
13.1 DC Characteristics: PIC16C62B/72A-04 (Commercial, Industrial, Extended)
PIC16C62B/72A-20 (Commercial, Industrial, Extended)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature 0°C T
A +70°C for commercial
-40°C T
A +85°C for industrial
-40°C T
A +125°C for extended
Param
No.
Sym Characteristic Min Typ† Max Units Conditions
D001
D001A
V
DD Supply Voltage 4.0
4.5
V
BOR*
-
-
-
5.5
5.5
5.5
V
V
V
XT, RC and LP osc mode
HS osc mode
BOR enabled (Note 7)
D002* V
DR RAM Data Retention
Voltage (Note 1)
-1.5- V
D003 V
POR VDD Start Voltage to
ensure internal
Power-on Reset signal
-VSS - V See section on Power-on Reset for details
D004*
D004A*
SVDD VDD Rise Rate to
ensure internal
Power-on Reset signal
0.05
TBD
-
-
-
-
V/ms PWRT enabled (PWRTE bit clear)
PWRT disabled (PWRTE
bit set)
See section on Power-on Reset for details
D005 V
BOR Brown-out Reset
voltage trip point
3.65 - 4.35 V BODEN bit set
D010
D013
I
DD Supply Current
(Note 2, 5)
-
-
2.7
10
5
20
mA
mA
XT, RC osc modes
F
OSC = 4 MHz, VDD = 5.5V (Note 4)
HS osc mode
F
OSC = 20 MHz, VDD = 5.5V
D020
D021
D021B
I
PD Power-down Current
(Note 3, 5)
-
-
-
-
10.5
1.5
1.5
2.5
42
16
19
19
A
A
A
A
VDD = 4.0V, WDT enabled,-40C to +85C
V
DD = 4.0V, WDT disabled, 0C to +70C
V
DD = 4.0V, WDT disabled,-40C to +85C
V
DD = 4.0V, WDT disabled,-40C to +125C
D022*
D022A*
IWDT
IBOR
Module Differential
Current (Note 6)
Watchdog Timer
Brown-out Reset
-
-
6.0
TBD
20
200
A
A
WDTE BIT SET, VDD = 4.0V
BODEN bit set, V
DD = 5.0V
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only
and are not tested.
Note 1: This is the limit to which V
DD can be lowered without losing RAM data.
2: The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin
loading and switching rate, oscillator type, internal code execution pattern, and temperature also have an
impact on the current consumption.
The test conditions for all I
DD measurements in active operation mode are:
OSC1 = external square wave, from rail to rail; all I/O pins tristated, pulled to V
DD,
MCLR
= VDD; WDT enabled/disabled as specified.
3: The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is
measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to V
DD and VSS.
4: For RC osc mode, current through Rext is not included. The current through the resistor can be estimated by
the formula Ir = VDD/2Rext (mA) with Rext in kOhm.
5: Timer1 oscillator (when enabled) adds approximately 20 A to the specification. This value is from charac-
terization and is for design guidance only. This is not tested.
6: The current is the additional current consumed when this peripheral is enabled. This current should be
added to the base I
DD or IPD measurement.
7: This is the voltage where the device enters the Brown-out Reset. When BOR is enabled, the device will
perform a brown-out reset when V
DD falls below VBOR.