Datasheet

PIC16C62B/72A
 1998-2013 Microchip Technology Inc. Preliminary DS35008C-page 7
2.0 MEMORY ORGANIZATION
There are two memory blocks in each of these micro-
controllers. Each block (Program Memory and Data
Memory) has its own bus, so that concurrent access
can occur.
Additional information on device memory may be found
in the PICmicro Mid-Range Reference Manual,
(DS33023).
2.1 Program Memory Organization
The PIC16C62B/72A devices have a 13-bit program
counter capable of addressing an 8K x 14 program
memory space. Each device has 2K x 14 words of pro-
gram memory. Accessing a location above 07FFh will
cause a wraparound.
The reset vector is at 0000h and the interrupt vector is
at 0004h.
FIGURE 2-1: PROGRAM MEMORY MAP
AND STACK
PC<12:0>
13
0000h
0004h
0005h
07FFh
0800h
1FFFh
Stack Level 1
Stack Level 8
Reset Vector
Interrupt Vector
On-chip Program
Memory
CALL, RETURN
RETFIE, RETLW
User Memory
Space