Datasheet

PIC16C62B/72A
 1998-2013 Microchip Technology Inc. Preliminary DS35008C-page 51
When the A/D conversion is complete, the result is
loaded into the ADRES register, the GO/DONE
bit,
ADCON0<2>, is cleared, and the A/D interrupt flag bit,
ADIF, is set. The block diagram of the A/D module is
shown in Figure 9-1.
The value that is in the ADRES register is not modified
for a Power-on Reset. The ADRES register will contain
unknown data after a Power-on Reset.
After the A/D module has been configured as desired,
the selected channel must be acquired before the con-
version is started. The analog input channels must
have their corresponding TRIS bits selected as an
input. To determine acquisition time, see Section 9.1.
After this acquisition time has elapsed, the A/D conver-
sion can be started. The following steps should be fol-
lowed for doing an A/D conversion:
1. Configure the A/D module:
• Configure analog pins / voltage reference /
and digital I/O (ADCON1)
• Select A/D input channel (ADCON0)
• Select A/D conversion clock (ADCON0)
• Turn on A/D module (ADCON0)
2. Configure A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• Set GIE bit
3. Wait the required acquisition time.
4. Start conversion:
• Set GO/DONE
bit (ADCON0)
5. Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
6. Read A/D Result register (ADRES), clear bit
ADIF if required.
7. For next conversion, go to step 1 or step 2 as
required. The A/D conversion time per bit is
defined as T
AD. A minimum wait of 2TAD is
required before next acquisition starts.
FIGURE 9-1: A/D BLOCK DIAGRAM
(Input voltage)
V
IN
VREF
(Reference
voltage)
V
DD
PCFG2:PCFG0
CHS2:CHS0
000 or
010 or
100 or
001 or
011 or
101
RA5/AN4
RA3/AN3/V
REF
RA2/AN2
RA1/AN1
RA0/AN0
100
011
010
001
000
A/D
Converter
11x