Datasheet

PIC16C62B/72A
 1998-2013 Microchip Technology Inc. Preliminary DS35008C-page 39
8.0 SYNCHRONOUS SERIAL PORT
(SSP) MODULE
8.1 SSP Module Overview
The Synchronous Serial Port (SSP) module is a serial
interface useful for communicating with other periph-
eral or microcontroller devices. These peripheral
devices may be Serial EEPROMs, shift registers, dis-
play drivers, A/D converters, etc. The SSP module can
operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I
2
C)
For more information on SSP operation (including an
I
2
C Overview), refer to the PIC
®
MCU Mid-Range Ref-
erence Manual, (DS33023). Also, refer to Application
Note AN578,
“Use of the SSP Module in the I
2
C Multi-
Master Environment.”
8.2 SPI Mode
This section contains register definitions and opera-
tional characteristics of the SPI module.
Additional information on SPI operation may be found
in the PIC
®
MCU Mid-Range Reference Manual,
(DS33023).
8.2.1 OPERATION OF SSP MODULE IN SPI
MODE
A block diagram of the SSP Module in SPI Mode is
shown in Figure 8-1.
The SPI mode allows 8-bits of data to be synchro-
nously transmitted and received simultaneously. To
accomplish communication, three pins are used:
• Serial Data Out (SDO)RC5/SDO
• Serial Data In (SDI)RC4/SDI/SDA
• Serial Clock (SCK)RC3/SCK/SCL
Additionally, a fourth pin may be used when in a slave
mode of operation:
•Slave Select (SS
)RA5/SS/AN4
When initializing the SPI, several options need to be
specified. This is done by programming the appropriate
control bits in the SSPCON register (SSPCON<5:0>)
and SSPSTAT<7:6>. These control bits allow the fol-
lowing to be specified:
• Master Operation (SCK is the clock output)
• Slave Mode (SCK is the clock input)
• Clock Polarity (Idle state of SCK)
• Clock Edge (Output data on rising/falling edge of
SCK)
• Clock Rate (master operation only)
• Slave Select Mode (Slave mode only)
To enable the serial port, SSP Enable bit, SSPEN
(SSPCON<5>) must be set. To reset or reconfigure SPI
mode, clear bit SSPEN, re-initialize the SSPCON reg-
ister, and then set bit SSPEN. This configures the SDI,
SDO, SCK and SS
pins as serial port pins. For the pins
to behave as the serial port function, they must have
their data direction bits (in the TRISC register) appro-
priately programmed. That is:
• SDI must have TRISC<4> set
• SDO must have TRISC<5> cleared
• SCK (master operation) must have TRISC<3>
cleared
• SCK (Slave mode) must have TRISC<3> set
•SS
must have TRISA<5> set (if used)
FIGURE 8-1: SSP BLOCK DIAGRAM
(SPI MODE)
Note: When the SPI is in Slave Mode with SS pin
control enabled, (SSPCON<3:0> = 0100)
the SPI module will reset if the SS pin is set
to V
DD.
Note: If the SPI is used in Slave Mode with
CKE = '1', then the SS pin control must be
enabled.
Read Write
Internal
Data Bus
RC4/SDI/SDA
RC5/SDO
RA5/SS/AN4
RC3/SCK/
SSPSR reg
SSPBUF reg
SSPM3:SSPM0
bit0
Shift
Clock
SS
Control
Enable
Edge
Select
Clock Select
TMR2 output
T
CY
Prescaler
4, 16, 64
TRISC<3>
2
Edge
Select
2
4
SCL