Datasheet
PIC16C712/716
DS41106C-page 12 1999-2013 Microchip Technology Inc.
Bank 1
80h INDF
(1)
Addressing this location uses contents of FSR to address data memory (not a physical register) 0000 0000 0000 0000
81h
OPTION_
REG
RBPU
INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111
82h PCL
(1)
Program Counter’s (PC) Least Significant Byte 0000 0000 0000 0000
83h STATUS
(1)
IRP
(4)
RP1
(4)
RP0 TO PD ZDCCrr01 1xxx rr0q quuu
84h FSR
(1)
Indirect Data Memory Address Pointer xxxx xxxx uuuu uuuu
85h TRISA
— ——
(7)
PORTA Data Direction Register --x1 1111 --x1 1111
86h TRISB PORTB Data Direction Register 1111 1111 1111 1111
87h TRISCCP —
(7)
—
(7)
—
(7)
—
(7)
—
(7)
TCCP
—
(7)
TT1CK
xxxx x1x1 xxxx x1x1
88h-89h — Unimplemented — —
8Ah PCLATH
(1,2)
— — — Write Buffer for the upper 5 bits of the Program Counter ---0 0000 ---0 0000
8Bh INTCON
(1)
GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u
8Ch PIE1
—ADIE— — — CCP1IE TMR2IE TMR1IE -0-- -000 -0-- -000
8Dh — Unimplemented — —
8Eh PCON
— — — — — — POR BOR ---- --qq ---- --uu
8Fh-91h — Unimplemented — —
92h PR2 Timer2 Period Register 1111 1111 1111 1111
93h-9Eh — Unimplemented — —
9Fh ADCON1
— — — — — PCFG2 PCFG1 PCFG0 ---- -000 ---- -000
Legend: x = unknown, u = unchanged, q = value depends on condition, — = unimplemented, read as ‘0’,
Shaded locations are unimplemented, read as ‘0’.
Note 1: These registers can be addressed from either bank.
2: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for PC<12:8> whose contents
are transferred to the upper byte of the program counter.
3: Other (non Power-up) Resets include: external Reset through MCLR
and the Watchdog Timer Reset.
4: The IRP and RP1 bits are reserved. Always maintain these bits clear.
5: On any device Reset, these pins are configured as inputs.
6: This is the value that will be in the port output latch.
7: Reserved bits; Do Not Use.
TABLE 2-1: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on:
POR,
BOR
Value on
all other
Resets (4)