Datasheet

 1997 Microchip Technology Inc. DS30272A-page 97
PIC16C71X
Applicable Devices 710 71 711 715
FIGURE 11-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER TIMING
FIGURE 11-5: BROWN-OUT RESET TIMING
TABLE 11-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER,
AND BROWN-OUT RESET REQUIREMENTS
Parameter
No.
Sym Characteristic Min Typ† Max Units Conditions
30 TmcL MCLR Pulse Width (low) 1 — — µs VDD = 5V, -40˚C to +125˚C
31 Twdt Watchdog Timer Time-out Period
(No Prescaler)
7* 18 33* ms VDD = 5V, -40˚C to +125˚C
32 Tost Oscillation Start-up Timer Period — 1024TOSC — — TOSC = OSC1 period
33 Tpwrt Power up Timer Period 28* 72 132* ms VDD = 5V, -40˚C to +125˚C
34 TIOZ I/O Hi-impedance from MCLR Low
or Watchdog Timer Reset
— — 1.1 µs
35 TBOR Brown-out Reset pulse width 100 — — µs 3.8V ≤ VDD ≤ 4.2V
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
VDD
MCLR
Internal
POR
PWRT
Time-out
OSC
Time-out
Internal
RESET
Watchdog
Timer
RESET
33
32
30
31
34
I/O Pins
34
Note: Refer to Figure 11-1 for load conditions.
VDD
BVDD
35