Datasheet

1997 Microchip Technology Inc. DS30272A-page 95
PIC16C71X
Applicable Devices 710 71 711 715
11.5 Timing Diagrams and Specifications
FIGURE 11-2: EXTERNAL CLOCK TIMING
TABLE 11-2: EXTERNAL CLOCK TIMING REQUIREMENTS
Parameter
No.
Sym Characteristic Min Typ† Max Units Conditions
Fosc External CLKIN Frequency
(Note 1)
DC 4 MHz XT osc mode
DC 4 MHz HS osc mode (-04)
DC 10 MHz HS osc mode (-10)
DC 20 MHz HS osc mode (-20)
DC 200 kHz LP osc mode
Oscillator Frequency
(Note 1)
DC 4 MHz RC osc mode
0.1 4 MHz XT osc mode
4
5
20
200
MHz
kHz
HS osc mode
LP osc mode
1 Tosc External CLKIN Period
(Note 1)
250 ns XT osc mode
250 ns HS osc mode (-04)
100 ns HS osc mode (-10)
50 ns HS osc mode (-20)
5 µs LP osc mode
Oscillator Period
(Note 1)
250 ns RC osc mode
250 10,000 ns XT osc mode
250 250 ns HS osc mode (-04)
100
50
250
250
ns
ns
HS osc mode (-10)
HS osc mode (-20)
5 µs LP osc mode
2 T
CY Instruction Cycle Time (Note 1) 200 DC ns TCY = 4/FOSC
3 TosL,
TosH
External Clock in (OSC1) High
or Low Time
50 ns XT oscillator
2.5 µs LP oscillator
10 ns HS oscillator
4 TosR,
TosF
External Clock in (OSC1) Rise
or Fall Time
25 ns XT oscillator
50 ns LP oscillator
15 ns HS oscillator
Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: Instruction cycle period (TCY) equals four times the input oscillator time-base period. All specified values are based on
characterization data for that particular oscillator type under standard operating conditions with the device executing
code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current
consumption. All devices are tested to operate at "min." values with an external clock applied to the OSC1/CLKIN pin.
When an external clock input is used, the "Max." cycle time limit is "DC" (no clock) for all devices. OSC2 is disconnected
(has no loading) for the PIC16C710/711.
OSC1
CLKOUT
Q4 Q1 Q2 Q3 Q4 Q1
1
2
3
3
4
4