Datasheet

PIC16C71X
DS30272A-page 74  1997 Microchip Technology Inc.
CLRF Clear f
Syntax: [
label ] CLRF f
Operands: 0 ≤ f ≤ 127
Operation: 00h → (f)
1 → Z
Status Affected: Z
Encoding:
00 0001 1fff ffff
Description:
The contents of register 'f' are cleared
and the Z bit is set.
Words: 1
Cycles: 1
Q Cycle Activity: Q1 Q2 Q3 Q4
Decode Read
register
'f'
Process
data
Write
register 'f'
Example
CLRF FLAG_REG
Before Instruction
FLAG_REG = 0x5A
After Instruction
FLAG_REG = 0x00
Z = 1
CLRW Clear W
Syntax: [
label ] CLRW
Operands: None
Operation: 00h → (W)
1 → Z
Status Affected: Z
Encoding:
00 0001 0xxx xxxx
Description:
W register is cleared. Zero bit (Z) is
set.
Words: 1
Cycles: 1
Q Cycle Activity: Q1 Q2 Q3 Q4
Decode NOP Process
data
Write to
W
Example
CLRW
Before Instruction
W = 0x5A
After Instruction
W = 0x00
Z = 1
CLRWDT Clear Watchdog Timer
Syntax: [
label ] CLRWDT
Operands: None
Operation: 00h → WDT
0 → WDT prescaler,
1 → T
O
1 → PD
Status Affected: TO, PD
Encoding:
00 0000 0110 0100
Description:
CLRWDT instruction resets the Watch-
dog Timer. It also resets the prescaler
of the WDT. Status bits TO and PD
are set.
Words: 1
Cycles: 1
Q Cycle Activity: Q1 Q2 Q3 Q4
Decode NOP Process
data
Clear
WDT
Counter
Example
CLRWDT
Before Instruction
WDT counter = ?
After Instruction
WDT counter = 0x00
WDT prescaler= 0
TO = 1
PD = 1