Datasheet

 1997 Microchip Technology Inc. DS30390D-page 167
PIC16C71X
Figure 7-3: ADCON1 Register, PIC16C710/71/711
(Address 88h),
PIC16C715 (Address 9Fh)........................ 38
Figure 7-4: A/D Block Diagram.................................... 39
Figure 7-5: Analog Input Model ................................... 40
Figure 7-6: A/D Transfer Function............................... 45
Figure 7-7: Flowchart of A/D Operation....................... 45
Figure 8-1: Configuration Word for PIC16C71 ............47
Figure 8-2: Configuration Word, PIC16C710/711........ 48
Figure 8-3: Configuration Word, PIC16C715............... 48
Figure 8-4: Crystal/Ceramic Resonator Operation
(HS, XT or LP OSC Configuration) ........... 49
Figure 8-5: External Clock Input Operation
(HS, XT or LP OSC Configuration) ........... 49
Figure 8-6: External Parallel Resonant Crystal
Oscillator Circuit........................................ 51
Figure 8-7: External Series Resonant Crystal
Oscillator Circuit........................................ 51
Figure 8-8: RC Oscillator Mode................................... 51
Figure 8-9: Simplified Block Diagram of On-chip
Reset Circuit.............................................. 52
Figure 8-10: Brown-out Situations................................. 53
Figure 8-11: Time-out Sequence on Power-up
(MCLR not Tied to VDD): Case 1............... 59
Figure 8-12: Time-out Sequence on Power-up
(MCLR Not Tied To VDD): Case 2............. 59
Figure 8-13: Time-out Sequence on Power-up
(MCLR
Tied to VDD).................................. 59
Figure 8-14: External Power-on Reset Circuit
(for Slow VDD Power-up)........................... 60
Figure 8-15: External Brown-out Protection Circuit 1 .... 60
Figure 8-16: External Brown-out Protection Circuit 2 .... 60
Figure 8-17: Interrupt Logic, PIC16C710, 71, 711......... 62
Figure 8-18: Interrupt Logic, PIC16C715....................... 62
Figure 8-19: INT Pin Interrupt Timing............................ 63
Figure 8-20: Watchdog Timer Block Diagram ............... 65
Figure 8-21: Summary of Watchdog Timer Registers ... 65
Figure 8-22: Wake-up from Sleep Through Interrupt..... 67
Figure 8-23: Typical In-Circuit Serial Programming
Connection................................................ 67
Figure 9-1: General Format for Instructions ................69
Figure 11-1: Load Conditions ........................................ 94
Figure 11-2: External Clock Timing ............................... 95
Figure 11-3: CLKOUT and I/O Timing........................... 96
Figure 11-4: Reset, Watchdog Timer, Oscillator
Start-up Timer and Power-up Timer
Timing ....................................................... 97
Figure 11-5: Brown-out Reset Timing............................ 97
Figure 11-6: Timer0 External Clock Timings ................. 98
Figure 11-7: A/D Conversion Timing ........................... 100
Figure 12-1: Typical IPD vs. VDD
(WDT Disabled, RC Mode) ..................... 101
Figure 12-2: Maximum IPD vs. VDD
(WDT Disabled, RC Mode) ..................... 101
Figure 12-3: Typical IPD vs. VDD @ 25°C
(WDT Enabled, RC Mode) ...................... 102
Figure 12-4: Maximum IPD vs. VDD
(WDT Enabled, RC Mode) ...................... 102
Figure 12-5: Typical RC Oscillator Frequency
vs. VDD .................................................... 102
Figure 12-6: Typical RC Oscillator Frequency
vs. V
DD .................................................... 102
Figure 12-7: Typical RC Oscillator Frequency
vs. VDD .................................................... 102
Figure 12-8: Typical IPD vs. VDD Brown-out Detect
Enabled (RC Mode) ................................ 103
Figure 12-9: Maximum I
PD vs. VDD Brown-out Detect
Enabled (85°C to -40°C, RC Mode)........ 103
Figure 12-10: Typical IPD vs. Timer1 Enabled
(32 kHz, RC0/RC1 = 33 pF/33 pF,
RC Mode) ............................................... 103
Figure 12-11: Maximum IPD vs. Timer1 Enabled
(32 kHz, RC0/RC1 = 33 pF/33 pF,
85°C to -40°C, RC Mode) ....................... 103
Figure 12-12: Typical IDD vs. Frequency
(RC Mode @ 22 pF, 25°C) ..................... 104
Figure 12-13: Maximum IDD vs. Frequency
(RC Mode @ 22 pF, -40°C to 85°C)....... 104
Figure 12-14: Typical IDD vs. Frequency
(RC Mode @ 100 pF, 25°C) ................... 105
Figure 12-15: Maximum IDD vs. Frequency
(RC Mode @ 100 pF, -40°C to 85°C)..... 105
Figure 12-16: Typical IDD vs. Frequency
(RC Mode @ 300 pF, 25°C) ................... 106
Figure 12-17: Maximum IDD vs. Frequency
(RC Mode @ 300 pF, -40°C to 85°C)..... 106
Figure 12-18: Typical IDD vs. Capacitance
@ 500 kHz (RC Mode) ........................... 107
Figure 12-19: Transconductance(gm) of
HS Oscillator vs. VDD.............................. 107
Figure 12-20: Transconductance(gm) of
LP Oscillator vs. VDD .............................. 107
Figure 12-21: Transconductance(gm) of
XT Oscillator vs. V
DD .............................. 107
Figure 12-22: Typical XTAL Startup Time vs.
VDD (LP Mode, 25°C) ............................. 108
Figure 12-23: Typical XTAL Startup Time vs.
VDD (HS Mode, 25°C)............................. 108
Figure 12-24: Typical XTAL Startup Time vs.
VDD (XT Mode, 25°C) ............................. 108
Figure 12-25: Typical IDD vs. Frequency
(LP Mode, 25°C)..................................... 109
Figure 12-26: Maximum IDD vs. Frequency
(LP Mode, 85°C to -40°C)....................... 109
Figure 12-27: Typical IDD vs. Frequency
(XT Mode, 25°C)..................................... 109
Figure 12-28: Maximum IDD vs. Frequency
(XT Mode, -40°C to 85°C) ...................... 109
Figure 12-29: Typical IDD vs. Frequency
(HS Mode, 25°C) .................................... 110
Figure 12-30: Maximum IDD vs. Frequency
(HS Mode, -40°C to 85°C) ...................... 110
Figure 13-1: Load Conditions...................................... 117
Figure 13-2: External Clock Timing............................. 118
Figure 13-3: CLKOUT and I/O Timing......................... 119
Figure 13-4: Reset, Watchdog Timer, Oscillator
Start-Up Timer, and Power-Up Timer
Timing..................................................... 120
Figure 13-5: Brown-out Reset Timing ......................... 120
Figure 13-6: Timer0 Clock Timings ............................. 121
Figure 13-7: A/D Conversion Timing........................... 124
Figure 14-1: Typical IPD vs. VDD
(WDT Disabled, RC Mode)..................... 125
Figure 14-2: Maximum IPD vs. VDD
(WDT Disabled, RC Mode)..................... 125
Figure 14-3: Typical IPD vs. VDD @ 25°C
(WDT Enabled, RC Mode)...................... 126
Figure 14-4: Maximum I
PD vs. VDD
(WDT Enabled, RC Mode)...................... 126
Figure 14-5: Typical RC Oscillator Frequency vs.
VDD ......................................................... 126