Datasheet

PIC16C71X
DS30272A-page 124  1997 Microchip Technology Inc.
Applicable Devices 710 71 711 715
FIGURE 13-7: A/D CONVERSION TIMING
TABLE 13-8: A/D CONVERSION REQUIREMENTS
Parameter
No.
Sym Characteristic Min Typ† Max Units Conditions
130 T
AD A/D clock period 1.6
2.0
—
—
µs
µs
VREF ≥ 3.0V
VREF full range
130 TAD A/D Internal RC
Oscillator source
ADCS1:ADCS0 = 11
(RC oscillator source)
3.0 6.0 9.0 µs PIC16LC715, VDD = 3.0V
2.0 4.0 6.0 µs PIC16C715
131 TCNV Conversion time
(not including S/H
time). Note 1
— 9.5TAD — —
132 TACQ Acquisition time Note 2 20 — µs
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: ADRES register may be read on the following TCY cycle.
131
130
132
BSF ADCON0, GO
Q4
A/D CLK
A/D DATA
ADRES
ADIF
GO
SAMPLE
OLD_DATA
SAMPLING STOPPED
DONE
NEW_DATA
(T
OSC/2)
(1)
7 6 5 4 3 2 1 0
Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the
SLEEP instruction to be executed.
1 Tcy