Datasheet

1997-2013 Microchip Technology Inc. DS30234E-page 153
PIC16C6X
NOP No Operation
Syntax: [
label
] NOP
Operands: None
Operation: No operation
Status Affected: None
Encoding:
00 0000 0xx0 0000
Description:
No operation.
Words: 1
Cycles: 1
Q Cycle Activity: Q1 Q2 Q3 Q4
Decode No-
Operation
No-
Operation
No-
Operation
Example
NOP
OPTION Load Option Register
Syntax: [
label
] OPTION
Operands: None
Operation: (W) OPTION
Status Affected: None
Encoding:
00 0000 0110 0010
Description:
The contents of the W register are
loaded in the OPTION register. This
instruction is supported for code com-
patibility with PIC16C5X products.
Since OPTION is a readable/writable
register, the user can directly address
it.
Words: 1
Cycles: 1
Example
To maintain upward compatibility
with future PIC16CXX products, do
not use this instruction.
RETFIE Return from Interrupt
Syntax: [
label
] RETFIE
Operands: None
Operation: TOS PC,
1 GIE
Status Affected: None
Encoding:
00 0000 0000 1001
Description:
Return from Interrupt. Stack is POPed
and Top of Stack (TOS) is loaded in the
PC. Interrupts are enabled by setting
Global Interrupt Enable bit, GIE
(INTCON<7>). This is a two cycle
instruction.
Words: 1
Cycles: 2
Q Cycle Activity: Q1 Q2 Q3 Q4
1st Cycle
Decode No-
Operation
Set the
GIE bit
Pop from
the Stack
2nd Cycle
No-
Operation
No-
Operation
No-
Operation
No-
Operation
Example
RETFIE
After Interrupt
PC = TOS
GIE = 1