Datasheet

PIC16C6X
DS30234E-page 110  1997-2013 Microchip Technology Inc.
12.1.1 SAMPLING
The data on the RC7/RX/DT pin is sampled three times
by a majority detect circuit to determine if a high or a
low level is present at the RX pin. If bit BRGH
(TXSTA<2>) is clear (i.e., at the low baud rates), the
sampling is done on the seventh, eighth and ninth fall-
ing edges of a x16 clock (Figure 12-3). If bit BRGH is
set (i.e., at the high baud rates), the sampling is done
on the 3 clock edges preceding the second rising edge
after the first falling edge of a x4 clock (Figure 12-4 and
Figure 12-5).
FIGURE 12-3: RX PIN SAMPLING SCHEME (BRGH = 0) PIC16C63/R63/65/65A/R65)
FIGURE 12-4: RX PIN SAMPLING SCHEME (BRGH = 1) (PIC16C63/R63/65/65A/R65)
FIGURE 12-5: RX PIN SAMPLING SCHEME (BRGH = 1) (PIC16C63/R63/65/65A/R65)
RX
baud CLK
x16 CLK
Start bit
Bit0
Samples
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3
Baud CLK for all but start bit
(RC7/RX/DT pin)
RC7/RX/DT pin
baud clk
x4 clk
Q2, Q4 clk
Start Bit
bit0 bit1
First falling edge after RX pin goes low
Second rising edge
Samples Samples Samples
1234123412
RC7/RX/DT pin
baud clk
x4 clk
Q2, Q4 clk
Start Bit
bit0
First falling edge after RX pin goes low
Second rising edge
Samples
1234
Baud clk for all but start bit