Datasheet

 1998-2013 Microchip Technology Inc. DS30605D-page 49
PIC16C63A/65B/73B/74B
9.0 CAPTURE/COMPARE/PWM
MODULES
Each Capture/Compare/PWM (CCP) module contains
a 16-bit register which can operate as a:
• 16-bit Capture register
• 16-bit Compare register
• PWM Master/Slave Duty Cycle register
Both the CCP1 and CCP2 modules are identical in
operation, with the exception being the operation of the
special event trigger. Table 9-1 and Table 9-2 show the
resources and interactions of the CCP module(s). In
the following sections, the operation of a CCP module
is described with respect to CCP1. CCP2 operates the
same as CCP1, except where noted.
CCP1 Module:
Capture/Compare/PWM Register1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. The special event trigger is
generated by a compare match and will reset Timer1.
CCP2 Module:
Capture/Compare/PWM Register2 (CCPR2) is com-
prised of two 8-bit registers: CCPR2L (low byte) and
CCPR2H (high byte). The CCP2CON register controls
the operation of CCP2. The special event trigger is
generated by a compare match and will reset Timer1
and start an A/D conversion (if the A/D module is
enabled).
Additional information on CCP modules is available in
the PIC
®
Mid-Range MCU Family Reference Manual
(DS33023) and in “Using the CCP Modules” (AN594).
TABLE 9-1: CCP MODE - TIMER
RESOURCES REQUIRED
TABLE 9-2: INTERACTION OF TWO CCP MODULES
CCP Mode Timer Resource
Capture
Compare
PWM
Timer1
Timer1
Timer2
CCPx Mode CCPy Mode Interaction
Capture Capture Same TMR1 time-base.
Capture Compare The compare should be configured for the special event trigger, which clears TMR1.
Compare Compare The compare(s) should be configured for the special event trigger, which clears TMR1.
PWM PWM The PWMs will have the same frequency and update rate (TMR2 interrupt).
PWM Capture None.
PWM Compare None.