Datasheet

1998-2013 Microchip Technology Inc. DS30605D-page 169
PIC16C63A/65B/73B/74B
INDEX
A
A/D
ADCON0 Register....................................................... 79
ADCON1 Register....................................................... 80
Analog Input Model Block Diagram............................. 82
Analog-to-Digital Converter......................................... 79
Block Diagram.............................................................81
Configuring Analog Port Pins......................................83
Configuring the Interrupt ............................................. 81
Configuring the Module...............................................81
Conversion Clock........................................................83
Conversions................................................................ 83
Converter Characteristics .........................................137
Effects of a RESET.....................................................83
Faster Conversion - Lower Resolution Trade-off ........ 83
Internal Sampling Switch (Rss) Impedance ................ 82
Operation During SLEEP............................................83
Sampling Requirements.............................................. 82
Source Impedance...................................................... 82
Timing Diagram.........................................................138
Using the CCP Trigger................................................ 83
Absolute Maximum Ratings .............................................. 113
ACK
...............................................................................60, 62
ADRES Register ...........................................................17, 79
Application Notes
AN552 (Implementing Wake-up on Key Strokes
Using PIC16CXXX)..................................................... 31
AN556 (Table Reading Using PIC16CXX).................. 26
AN578 (Use of the SSP Module in the I
2
C
Multi-Master Environment).......................................... 55
AN607, (Power-up Trouble Shooting)......................... 89
Architecture
Overview.......................................................................9
Assembler
MPASM
®
Assembler .................................................107
B
Baud Rate Formula.............................................................67
BF .................................................................................56, 60
Block Diagrams
A/D..............................................................................81
Analog Input Model..................................................... 82
Capture....................................................................... 51
Compare .....................................................................52
I
2
C Mode..................................................................... 60
On-Chip Reset Circuit.................................................88
PIC16C74 ................................................................... 10
PIC16C74A ................................................................. 10
PIC16C77 ................................................................... 10
PORTC ....................................................................... 33
PORTD (In I/O Port Mode).......................................... 34
PORTD and PORTE as a Parallel Slave Port............. 37
PORTE (In I/O Port Mode).......................................... 35
PWM ........................................................................... 52
RA4/T0CKI Pin............................................................ 29
RB3:RB0 Port Pins ..................................................... 31
RB7:RB4 Port Pins ..................................................... 31
SSP in I
2
C Mode.........................................................60
SSP in SPI Mode ........................................................55
Timer0/WDT Prescaler................................................ 39
Timer2.........................................................................47
USART Receive..........................................................70
USART Transmit.........................................................68
Watchdog Timer.......................................................... 96
BOR
bit......................................................................... 25, 89
BRGH bit ............................................................................ 67
Brown-out Reset (BOR)
Timing Diagram ........................................................ 126
Buffer Full Status bit, BF..................................................... 56
C
C bit .................................................................................... 19
Capture/Compare/PWM
Capture
Block Diagram .................................................... 51
CCP1CON Register............................................ 50
CCP1IF............................................................... 51
Mode .................................................................. 51
Prescaler ............................................................ 51
CCP Timer Resources................................................ 49
Compare
Block Diagram .................................................... 52
Mode .................................................................. 52
Software Interrupt Mode..................................... 52
Special Event Trigger......................................... 52
Special Trigger Output of CCP1......................... 52
Special Trigger Output of CCP2......................... 52
Interaction of Two CCP Modules ................................ 49
Section........................................................................ 49
Special Event Trigger and A/D Conversions............... 52
Capture/Compare/PWM (CCP)
PWM Block Diagram .................................................. 52
PWM Mode................................................................. 52
PWM, Example Frequencies/Resolutions .................. 53
Timing Diagram ........................................................ 128
CCP2IE bit.......................................................................... 24
CCP2IF bit.......................................................................... 24
CCPR1H Register......................................................... 17, 49
CCPR1L Register ............................................................... 49
CCPR2H Register............................................................... 17
CCPR2L Register ............................................................... 17
CCPxM0 bit......................................................................... 50
CCPxM1 bit......................................................................... 50
CCPxM2 bit......................................................................... 50
CCPxM3 bit......................................................................... 50
CCPxX bit........................................................................... 50
CCPxY bit........................................................................... 50
CKE .................................................................................... 56
CKP .................................................................................... 57
Clock Polarity Select bit, CKP............................................. 57
Clocking Scheme................................................................ 14
Code Examples
Call of a Subroutine in Page 1 from Page 0 ............... 26
Indirect Addressing..................................................... 27
Initializing PORTA....................................................... 29
Code Protection............................................................ 85, 98
Computed GOTO................................................................ 26
Configuration Bits ............................................................... 85
CREN bit............................................................................. 66
CS
pin................................................................................. 37