Datasheet

 1997-2013 Microchip Technology Inc. DS30234E-page 77

PIC16C6X

10.0 CAPTURE/COMPARE/PWM

(CCP) MODULE(s)

Each CCP (Capture/Compare/PWM) module contains

a 16-bit register which can operate as a 16-bit capture

master/slave duty cycle register. Both the CCP1 and

CCP2 modules are identical in operation, with the

exception of the operation of the special event trigger.

Table 10-1 and Table 10-2 show the resources and

interactions of the CCP modules(s). In the following

sections, the operation of a CCP module is described

with respect to CCP1. CCP2 operates the same as

CCP1, except where noted.

CCP1 module:

Capture/Compare/PWM Register1 (CCPR1) is com-

prised of two 8-bit registers: CCPR1L (low byte) and

CCPR1H (high byte). The CCP1CON register controls

the operation of CCP1. All are readable and writable.

Applicable Devices

61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67 CCP1

61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67 CCP2

CCP2 module:

Capture/Compare/PWM Register2 (CCPR2) is com-

prised of two 8-bit registers: CCPR2L (low byte) and

CCPR2H (high byte). The CCP2CON register controls

the operation of CCP2. All are readable and writable.

For use of the CCP modules, refer to the

Embedded

Control Handbook,

“Using the CCP Modules” (AN594).

TABLE 10-1: CCP MODE - TIMER

RESOURCE

CCP Mode Timer Resource

Capture

Compare

PWM

Timer1

Timer2

TABLE 10-2: INTERACTION OF TWO CCP MODULES

CCPx Mode CCPy Mode Interaction

Capture Capture Same TMR1 time-base.

Capture Compare The compare should be configured for the special event trigger, which clears TMR1.

Compare Compare The compare(s) should be configured for the special event trigger, which clears TMR1.

PWM PWM The PWMs will have the same frequency, and update rate (TMR2 interrupt).

PWM Capture None

PWM Compare None