Datasheet
PIC16C6X
DS30234E-page 128 1997-2013 Microchip Technology Inc.
13.3 Reset
The PIC16CXX differentiates between various kinds of
reset:
• Power-on Reset (POR)
•M
CLR reset during normal operation
•MCLR
reset during SLEEP
• WDT Reset (normal operation)
• Brown-out Reset (BOR) - Not on PIC16C61/62/
64/65
Some registers are not affected in any reset condition,
their status is unknown on POR and unchanged in any
other reset. Most other registers are reset to a “reset
state” on Power-on Reset (POR), on MCLR
or WDT
Reset, on MCLR
reset during SLEEP, and on Brown-
out Reset (BOR). They are not affected by a WDT
Wake-up, which is viewed as the resumption of normal
operation.
Applicable Devices
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
The TO and PD bits are set or cleared differently in dif-
ferent reset situations as indicated in Table 13-7,
Table 13-8, and Table 13-9. These bits are used in soft-
ware to determine the nature of the reset. See
Table 13-12 for a full description of reset states of all
registers.
A simplified block diagram of the on-chip reset circuit is
shown in Figure 13-9.
On the PIC16C62A/R62/63/R63/64A/R64/65A/R65/
66/67, the MCLR
reset path has a noise filter to detect
and ignore small pulses. See parameter #34 for pulse
width specifications.
It should be noted that a WDT Reset does not drive the
MCLR
pin low.
FIGURE 13-9: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
S
R
Q
External Reset
MCLR/VPP pin
V
DD pin
OSC1/
WDT
Module
V
DD rise
detect
OST/PWRT
On-chip
RC OSC
WDT
Power-on Reset
OST
10-bit Ripple counter
PWRT
Chip Reset
10-bit Ripple counter
Time-out
Enable OST
Enable PWRT
SLEEP
Brown-out
Reset
BODEN
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
2: Brown-out Reset is NOT implemented on the PIC16C61/62/64/65.
3: See Table 13-5 and Table 13-6 for time-out situations.
(2)
(1)
CLKIN
pin
(3)