Datasheet

 2003 Microchip Technology Inc. DS30235J-page 73
PIC16C62X
SWAPF Swap Nibbles in f
Syntax: [ label ] SWAPF f,d
Operands: 0 ≤ f ≤ 127
d ∈ [0,1]
Operation: (f<3:0>) → (dest<7:4>),
(f<7:4>) → (dest<3:0>)
Status Affected: None
Encoding:
00 1110 dfff ffff
Description: The upper and lower nibbles of
register 'f' are exchanged. If 'd' is
0, the result is placed in W
register. If 'd' is 1, the result is
placed in register 'f'.
Words: 1
Cycles: 1
Example
SWAPF
REG, 0
Before Instruction
REG1 = 0xA5
After Instruction
REG1 = 0xA5
W = 0x5A
TRIS Load TRIS Register
Syntax: [ label ] TRIS f
Operands: 5 ≤ f ≤ 7
Operation: (W) → TRIS register f;
Status Affected: None
Encoding:
00 0000 0110 0fff
Description: The instruction is supported for
code compatibility with the
PIC16C5X products. Since TRIS
registers are readable and
writable, the user can directly
address them.
Words: 1
Cycles: 1
Example
To maintain upward compatibil-
ity with future PICmicro
®
prod-
ucts, do not use this
instruction.
XORLW Exclusive OR Literal with W
Syntax: [ label
]
XORLW k
Operands: 0 ≤ k ≤ 255
Operation: (W) .XOR. k → (W)
Status Affected: Z
Encoding:
11 1010 kkkk kkkk
Description: The contents of the W register
are XOR’ed with the eight bit
literal 'k'. The result is placed in
the W register.
Words: 1
Cycles: 1
Example: XORLW 0xAF
Before Instruction
W= 0xB5
After Instruction
W = 0x1A
XORWF Exclusive OR W with f
Syntax: [ label ] XORWF f,d
Operands: 0 ≤ f ≤ 127
d ∈ [0,1]
Operation: (W) .XOR. (f) → (dest)
Status Affected: Z
Encoding:
00 0110 dfff ffff
Description: Exclusive OR the contents of the
W register with register 'f'. If 'd' is
0, the result is stored in the W
register. If 'd' is 1, the result is
stored back in register 'f'.
Words: 1
Cycles: 1
Example XORWF
REG
1
Before Instruction
REG = 0xAF
W=0xB5
After Instruction
REG = 0x1A
W=0xB5