Datasheet
2003 Microchip Technology Inc. DS30235J-page 39
PIC16C62X
The code example in Example 7-1 depicts the steps
required to configure the comparator module. RA3 and
RA4 are configured as digital output. RA0 and RA1 are
configured as the V- inputs and RA2 as the V+ input to
both comparators.
EXAMPLE 7-1: INITIALIZING
COMPARATOR MODULE
7.2 Comparator Operation
A single comparator is shown in Figure 7-2 along with
the relationship between the analog input levels and
the digital output. When the analog input at V
IN+ is less
than the analog input V
IN-, the output of the comparator
is a digital low level. When the analog input at V
IN+ is
greater than the analog input V
IN-, the output of the
comparator is a digital high level. The shaded areas of
the output of the comparator in Figure 7-2 represent
the uncertainty due to input offsets and response time.
7.3 Comparator Reference
An external or internal reference signal may be used
depending on the comparator Operating mode. The
analog signal that is present at V
IN- is compared to the
signal at V
IN+, and the digital output of the comparator
is adjusted accordingly (Figure 7-2).
FIGURE 7-2: SINGLE COMPARATOR
7.3.1 EXTERNAL REFERENCE SIGNAL
When external voltage references are used, the
comparator module can be configured to have the
comparators operate from the same or different
reference sources. However, threshold detector
applications may require the same reference. The
reference signal must be between V
SS and VDD, and
can be applied to either pin of the comparator(s).
7.3.2 INTERNAL REFERENCE SIGNAL
The comparator module also allows the selection of an
internally generated voltage reference for the
comparators. Section 10, Instruction Sets, contains a
detailed description of the Voltage Reference Module
that provides this signal. The internal reference signal
is used when the comparators are in mode
CM<2:0>=010 (Figure 7-1). In this mode, the internal
voltage reference is applied to the V
IN+ pin of both
comparators.
MOVLW 0x03 ;Init comparator mode
MOVWF CMCON ;CM<2:0> = 011
CLRF PORTA ;Init PORTA
BSF STATUS,RP0 ;Select Bank1
MOVLW 0x07 ;Initialize data direction
MOVWF TRISA ;Set RA<2:0> as inputs
;RA<4:3> as outputs
;TRISA<7:5> always read ‘0’
BCF STATUS,RP0 ;Select Bank 0
CALL DELAY 10 ;10µs delay
MOVF CMCON,F ;Read CMCON to end change condition
BCF PIR1,CMIF ;Clear pending interrupts
BSF STATUS,RP0 ;Select Bank 1
BSF PIE1,CMIE ;Enable comparator interrupts
BCF STATUS,RP0 ;Select Bank 0
BSF INTCON,PEIE ;Enable peripheral interrupts
BSF INTCON,GIE ;Global interrupt enable
V
IN–
V
IN+
utput
–
+
VIN+
V
IN-
Output
Output
VIN+
VIN-