Datasheet
PIC16C62X
DS30235J-page 30 2003 Microchip Technology Inc.
5.3 I/O Programming Considerations
5.3.1 BI-DIRECTIONAL I/O PORTS
Any instruction which writes, operates internally as a
read followed by a write operation. The BCF and BSF
instructions, for example, read the register into the
CPU, execute the bit operation and write the result
back to the register. Caution must be used when these
instructions are applied to a port with both inputs and
outputs defined. For example, a BSF operation on bit5
of PORTB will cause all eight bits of PORTB to be read
into the CPU. Then the BSF operation takes place on
bit5 and PORTB is written to the output latches. If
another bit of PORTB is used as a bi-directional I/O pin
(e.g., bit0) and it is defined as an input at this time, the
input signal present on the pin itself would be read into
the CPU and re-written to the data latch of this
particular pin, overwriting the previous content. As long
as the pin stays in the Input mode, no problem occurs.
However, if bit0 is switched into Output mode later on,
the content of the data latch may now be unknown.
Reading the port register reads the values of the port
pins. Writing to the port register writes the value to the
port latch. When using read-modify-write instructions
(ex. BCF, BSF, etc.) on a port, the value of the port pins
is read, the desired operation is done to this value, and
this value is then written to the port latch.
Example 5-2 shows the effect of two sequential read-
modify-write instructions (ex., BCF, BSF, etc.) on an
I/O port.
A pin actively outputting a Low or High should not be
driven from external devices at the same time in order
to change the level on this pin (“wired-or”, “wired-and”).
The resulting high output currents may damage
the chip.
EXAMPLE 5-2: READ-MODIFY-WRITE
INSTRUCTIONS ON AN I/O
PORT
5.3.2 SUCCESSIVE OPERATIONS ON I/O
PORTS
The actual write to an I/O port happens at the end of an
instruction cycle, whereas for reading, the data must be
valid at the beginning of the instruction cycle (Figure 5-7).
Therefore, care must be exercised if a write followed by a
read operation is carried out on the same I/O port. The
sequence of instructions should be such to allow the pin
voltage to stabilize (load dependent) before the next
instruction which causes that file to be read into the CPU
is executed. Otherwise, the previous state of that pin may
be read into the CPU rather than the new state. When in
doubt, it is better to separate these instructions with a NOP
or another instruction not accessing this I/O port.
FIGURE 5-7: SUCCESSIVE I/O OPERATION
;
;
Initial PORT settings: PORTB<7:4> Inputs
; PORTB<3:0> Outputs
;
;
PORTB<7:6> have external pull-up and are not
connected to other circuitry
;
; PORT latch PORT pins
; ---------- ---------
-
BCF PORTB, 7 ; 01pp pppp 11pp pppp
BCF PORTB, 6 ; 10pp pppp 11pp pppp
BSF STATUS,RP0 ;
BCF TRISB, 7 ; 10pp pppp 11pp pppp
BCF TRISB, 6 ; 10pp pppp 10pp pppp
;
; Note that the user may have expected the pin
; values to be 00pp pppp. The 2nd BCF caused
; RB7 to be latched as the pin value (High).
Note:
This example shows write to PORTB
followed by a read from PORTB.
Note that:
data setup time = (0.25 T
CY - TPD)
where T
CY = instruction cycle and
TPD = propagation delay of Q1
cycle to output valid.
Therefore, at higher clock frequen-
cies, a write followed by a read may
be problematic.
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
RB <7:0>
Port pin
sampled here
PC
PC + 1 PC + 2 PC + 3
NOPNOPMOVF PORTB, W
Read PORTB
MOVWF PORTB
Write to
PORTB
PC
Instruction
fetched
T
PD
Execute
MOVWF
PORTB
Execute
MOVF
PORTB, W
Execute
NOP
RB<7:0>
PC
PC+1
PC+2 PC+3
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
NOP
NOP
MOVF, PORTB, W
Read PORTB
MOVWF, PORTB
Write to
PORTB
Port pin
sampled here
TPD
Execute
MOVWF
PORTB
Execute
MOVF
PORTB, W
Execute
NOP
PC
Instruction
fetched