Datasheet
2003 Microchip Technology Inc. DS30235J-page 25
PIC16C62X
5.0 I/O PORTS
The PIC16C62X have two ports, PORTA and PORTB.
Some pins for these I/O ports are multiplexed with an
alternate function for the peripheral features on the
device. In general, when a peripheral is enabled, that
pin may not be used as a general purpose I/O pin.
5.1 PORTA and TRISA Registers
PORTA is a 5-bit wide latch. RA4 is a Schmitt Trigger
input and an open drain output. Port RA4 is multiplexed
with the T0CKI clock input. All other RA port pins have
Schmitt Trigger input levels and full CMOS output
drivers. All pins have data direction bits (TRIS regis-
ters), which can configure these pins as input or output.
A '1' in the TRISA register puts the corresponding out-
put driver in a Hi-impedance mode. A '0' in the TRISA
register puts the contents of the output latch on the
selected pin(s).
Reading the PORTA register reads the status of the
pins, whereas writing to it will write to the port latch. All
write operations are read-modify-write operations. So a
write to a port implies that the port pins are first read,
then this value is modified and written to the port data
latch.
The PORTA pins are multiplexed with comparator and
voltage reference functions. The operation of these
pins are selected by control bits in the CMCON
(comparator control register) register and the VRCON
(voltage reference control register) register. When
selected as a comparator input, these pins will read
as '0's.
FIGURE 5-1: BLOCK DIAGRAM OF
RA1:RA0 PINS
TRISA controls the direction of the RA pins, even when
they are being used as comparator inputs. The user
must make sure to keep the pins configured as inputs
when using them as comparator inputs.
The RA2 pin will also function as the output for the
voltage reference. When in this mode, the V
REF pin is a
very high impedance output and must be buffered prior
to any external load. The user must configure
TRISA<2> bit as an input and use high impedance
loads.
In one of the Comparator modes defined by the
CMCON register, pins RA3 and RA4 become outputs
of the comparators. The TRISA<4:3> bits must be
cleared to enable outputs to use this function.
EXAMPLE 5-1: INITIALIZING PORTA
FIGURE 5-2: BLOCK DIAGRAM OF RA2 PIN
Data
Bus
QD
Q
CK
P
N
WR
PORTA
WR
TRISA
Data Latch
TRIS Latch
RD TRISA
RD PORTA
Analog
V
SS
VDD
I/O
QD
Q
CK
Input Mode
DQ
EN
To Comparator
Schmitt Trigger
Input Buffer
VDD
Pin
VSS
Note: On RESET, the TRISA register is set to all
inputs. The digital inputs are disabled and
the comparator inputs are forced to ground
to reduce excess current consumption.
CLRF PORTA ;Initialize PORTA by setting
;output data latches
MOVLW 0X07 ;Turn comparators off and
MOVWF CMCON ;enable pins for I/O
;functions
BSF STATUS, RP0 ;Select Bank1
MOVLW 0x1F ;Value used to initialize
;data direction
MOVWF TRISA ;Set RA<4:0> as inputs
;TRISA<7:5> are always
;read as '0'.
Data
Bus
QD
Q
CK
P
N
WR
PORTA
WR
TRISA
Data Latch
TRIS Latch
RD TRISA
RD PORTA
Analog
V
SS
VDD
RA2
QD
Q
CK
Input Mode
DQ
EN
To Comparator
Schmitt Trigger
Input Buffer
VROE
VREF
VDD
VSS
Pin