Datasheet

PIC16C62X
DS30235J-page 104  2003 Microchip Technology Inc.
12.9 Timing Diagrams and Specifications
FIGURE 12-12: EXTERNAL CLOCK TIMING
TABLE 12-3: EXTERNAL CLOCK TIMING REQUIREMENTS
Parameter
No.
Sym Characteristic Min Typ† Max Units Conditions
1A Fosc External CLKIN Frequency
(1)
DC — 4 MHz XT and RC Osc mode, VDD=5.0V
DC — 20 MHz HS Osc mode
DC — 200 kHz LP Osc mode
Oscillator Frequency
(1)
DC — 4 MHz RC Osc mode, VDD=5.0V
0.1 — 4 MHz XT Osc mode
1 — 20 MHz HS Osc mode
DC — 200 kHz LP Osc mode
1 Tosc External CLKIN Period
(1)
250 — — ns XT and RC Osc mode
50 — — ns HS Osc mode
5——µs LP Osc mode
Oscillator Period
(1)
250 — — ns RC Osc mode
250 — 10,000 ns XT Osc mode
50 — 1,000 ns HS Osc mode
5——µs LP Osc mode
2T
CY Instruction Cycle Time
(1)
1.0 FOSC/4 DC µsTCYS=FOSC/4
3* TosL,
TosH
External Clock in (OSC1) High or
Low Time
100* — — ns XT oscillator, T
OSC L/H duty cycle
2* — — µs LP oscillator, T
OSC L/H duty cycle
20* — — ns HS oscillator, T
OSC L/H duty cycle
4* TosR,
TosF
External Clock in (OSC1) Rise or
Fall Time
25* — — ns XT oscillator
50* — — ns LP oscillator
15* — — ns HS oscillator
2: * These parameters are characterized but not tested.
3: † Data in "Typ" column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and
are not tested.
Note 1: Instruction cycle period (T
CY) equals four times the input oscillator time-base period. All specified values are based
on characterization data for that particular oscillator type under standard operating conditions with the device
executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than
expected current consumption. All devices are tested to operate at "min." values with an external clock applied to
the OSC1 pin. When an external clock input is used, the "Max." cycle time limit is "DC" (no clock) for all devices.
OSC1
CLKOUT
Q4
Q1 Q2
Q3 Q4 Q1
133
44
2