Datasheet

PIC16C5X
DS30453E-page 22 Preliminary  1997-2013 Microchip Technology Inc.
FIGURE 5-3: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED TO VDD)
FIGURE 5-4: TIME-OUT SEQUENCE ON POWER-UP (MCLR
TIED TO VDD): FAST VDD RISE
TIME
FIGURE 5-5: TIME-OUT SEQUENCE ON POWER-UP (MCLR
TIED TO VDD): SLOW VDD RISE
TIME
VDD
MCLR
INTERNAL POR
DRT TIME-OUT
INTERNAL RESET
TDRT
VDD
MCLR
INTERNAL POR
DRT TIME-OUT
INTERNAL RESET
TDRT
VDD
MCLR
INTERNAL POR
DRT TIME-OUT
INTERNAL RESET
V1
When VDD rises slowly, the TDRT time-out expires long before VDD has reached its final value. In
this example, the chip will RESET properly if, and only if, V1  V
DD min
TDRT