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ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller SOIC 18 8-Bit 4 MHz I/O number 12
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1997-2013 Microchip Technology Inc. Preliminary DS30453E-page 25
PIC16C5X
6.0 MEMORY ORGANIZATION
PIC16C5X memory is organized into program memory
and data memory. For devices with more than 512
bytes of program memory, a paging scheme is used.
Program memory pages are accessed using one or two
STATUS Register bits. For devices with a data memory
register file of more than 32 registers, a banking
scheme is used. Data memory banks are accessed
using the File Selection Register (FSR).
6.1 Program Memory Organization
The PIC16C54, PIC16CR54 and PIC16C55 have a 9-
bit Program Counter (PC) capable of addressing a 512
x 12 program memory space (Figure 6-1). The
PIC16C56 and PIC16CR56 have a 10-bit Program
Counter (PC) capable of addressing a 1K x 12 program
memory space (Figure 6-2). The PIC16CR57,
PIC16C58 and PIC16CR58 have an 11-bit Program
Counter capable of addressing a 2K x 12 program
memory space (Figure 6-3). Accessing a location
above the physically implemented address will cause a
wraparound.
A NOP at the RESET vector location will cause a restart
at location 000h. The RESET vector for the PIC16C54,
PIC16CR54 and PIC16C55 is at 1FFh. The RESET
vector for the PIC16C56 and PIC16CR56 is at 3FFh.
The RESET vector for the PIC16C57, PIC16CR57,
PIC16C58, and PIC16CR58 is at 7FFh. See
Section 6.5 for additional information using CALL and
GOTO instructions.
FIGURE 6-1: PIC16C54/CR54/C55
PROGRAM MEMORY MAP
AND STACK
FIGURE 6-2: PIC16C56/CR56
PROGRAM MEMORY MAP
AND STACK
FIGURE 6-3: PIC16C57/CR57/C58/
CR58 PROGRAM
MEMORY MAP AND
STACK