Datasheet
1996-2013 Microchip Technology Inc. Preliminary DS40143E-page 97
PIC16C55X
APPENDIX A: ENHANCEMENTS
The following are the list of enhancements over the
PIC16C5X microcontroller family:
1. Instruction word length is increased to 14 bits.
This allows larger page sizes both in program
memory (4K now as opposed to 512 before) and
register file (up to 128 bytes now versus 32
bytes before).
2. A PC high latch register (PCLATH) is added to
handle program memory paging. PA2, PA1, PA0
bits are removed from STATUS register.
3. Data memory paging is slightly redefined.
STATUS register is modified.
4. Four new instructions have been added:
RETURN, RETFIE, ADDLW, and SUBLW.
Two instructions
TRIS and OPTION are being
phased out although they are kept for
compatibility with PIC16C5X.
5. OPTION and TRIS registers are made
addressable.
6. Interrupt capability is added. Interrupt vector is
at 0004h.
7. Stack size is increased to 8 deep.
8. RESET vector is changed to 0000h.
9. RESET of all registers is revised. Three different
RESET (and wake-up) types are recognized.
Registers are reset differently.
10. Wake-up from SLEEP through interrupt is
added.
11. Two separate timers, Oscillator Start-up Timer
(OST) and Power-up Timer (PWRT) are
included for more reliable power-up. These
timers are invoked selectively to avoid
unnecessary delays on power-up and wake-up.
12. PORTB has weak pull-ups and interrupt-on-
change feature.
13. Timer0 clock input, T0CKI pin is also a port pin
(RA4/T0CKI) and has a TRIS bit.
14. FSR is made a full 8-bit register.
15. “In-circuit programming” is made possible. The
user can program PIC16C55X devices using
only five pins: V
DD, VSS, VPP, RB6 (clock) and
RB7 (data in/out).
16. PCON status register is added with a Power-on
Reset (POR
) status bit.
17. Code protection scheme is enhanced such that
portions of the program memory can be
protected, while the remainder is unprotected.
18. PORTA inputs are now Schmitt Trigger inputs.
APPENDIX B: COMPATIBILITY
To convert code written for PIC16C5X to PIC16C55X,
the user should take the following steps:
1. Remove any program memory page select
operations (PA2, PA1, PA0 bits) for
CALL, GOTO.
2. Revisit any computed jump operations (write to
PC or add to PC, etc.) to make sure page bits
are set properly under the new scheme.
3. Eliminate any data memory page switching.
Redefine data variables to reallocate them.
4. Verify all writes to STATUS, OPTION, and FSR
registers since these have changed.
5. Change RESET vector to 0000h.
APPENDIX C: REVISION HISTORY
Revision E (January 2013)
Added a note to each package outline drawing.