Datasheet

 1996-2013 Microchip Technology Inc. Preliminary DS40143E-page 81
PIC16C55X
10.4 Timing Diagrams and Specifications
FIGURE 10-6: EXTERNAL CLOCK TIMING
TABLE 10-1: EXTERNAL CLOCK TIMING REQUIREMENTS
Parameter
No.
Sym Characteristic Min Typ† Max Units Conditions
Fos External CLKIN Frequency
(1)
DC — 4 MHz XT and RC osc mode, VDD=5.0V
DC — 20 MHz HS osc mode
DC — 200 kHz LP osc mode
Oscillator Frequency
(1)
DC — 4 MHz RC osc mode, VDD=5.0V
0.1 — 4 MHz XT osc mode
1 — 20 MHz HS osc mode
DC – 200 kHz LP osc mode
1
Tosc External CLKIN Period
(1)
250 — — ns XT and RC osc mode
50 — — ns HS osc mode
5——
s LP osc mode
Oscillator Period
(1)
250 — — ns RC osc mode
250 — 10,000 ns XT osc mode
50 — 1,000 ns HS osc mode
5——
s LP osc mode
2 Tcy Instruction Cycle Time
(1)
1.0 Fos/4 DC sTCY=FOS/4
3* TosL,
TosH
External Clock in (OSC1) High or
Low Time
100* — — ns XT osc mode
2* — —
s LP osc mode
20* — — ns HS osc mode
4* TosR,
TosF
External Clock in (OSC1) Rise or
Fall Time
25* — — ns XT osc mode
50* — — ns LP osc mode
15* — — ns HS osc mode
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5.0 V, 25C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: Instruction cycle period (T
CY) equals four times the input oscillator time-base period. All specified values are based on
characterization data for that particular oscillator type under standard operating conditions with the device executing
code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current
consumption. All devices are tested to operate at “min.” values with an external clock applied to the OSC1 pin.
When an external clock input is used, the “Max.” cycle time limit is “DC” (no clock) for all devices.
OSC1
CLKOUT
Q4
Q1 Q2
Q3 Q4 Q1
133
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