Datasheet

PIC16C55X
DS40143E-page 40 Preliminary  1996-2013 Microchip Technology Inc.
FIGURE 6-9: TIMEOUT SEQUENCE ON POWER-UP (MCLR TIED TO VDD): CASE 3
FIGURE 6-10: EXTERNAL POWER-ON
RESET CIRCUIT (FOR
SLOW V
DD POWER-UP)
TPWRT
TOST
VDD
MCLR
INTERNAL POR
PWRT TIMEOUT
OST TIMEOUT
INTERNAL RESET
Note 1: External Power-on Reset circuit is required only if
V
DD power-up slope is too slow. The diode D helps
discharge the capacitor quickly when V
DD powers
down.
2: < 40 k is recommended to make sure that voltage
drop across R does not violate the device’s electrical
specification.
3: R1 = 100 to 1 k will limit any current flowing into
MCLR
from external capacitor C in the event of
MCLR
/VPP pin breakdown due to Electrostatic Dis-
charge (ESD) or Electrical Overstress (EOS).
C
R1
R
D
V
DD
MCLR
PIC16C55X
VDD