Datasheet

PIC16C55X
DS40143E-page 38 Preliminary  1996-2013 Microchip Technology Inc.
TABLE 6-5: INITIALIZATION CONDITION FOR SPECIAL REGISTERS
TABLE 6-6: INITIALIZATION CONDITION FOR REGISTERS
Condition
Program
Counter
STATUS
Register
PCON
Register
Power-on Reset 000h 0001 1xxx ---- --0-
MCLR Reset during normal operation 000h 000u uuuu ---- --u-
MCLR
Reset during SLEEP 000h 0001 0uuu ---- --u-
WDT Reset 000h 0000 uuuu ---- --u-
WDT Wake-up PC + 1 uuu0 0uuu ---- --u-
Interrupt Wake-up from SLEEP PC + 1
(1)
uuu1 0uuu ---- --u-
Legend:
u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’, q = value depends on condition.
Note 1: When the wake-up is due to an interrupt and global enable bit, GIE is set, the PC is loaded with the inter-
rupt vector (0004h) after execution of PC+1.
Register Address Power-on Reset
MCLR
Reset during normal
operation
MCLR Reset during SLEEP
WDT Reset
Wake-up from SLEEP
through interrupt
Wake-up from SLEEP
through WDT timeout
W—xxxx xxxx uuuu uuuu uuuu uuuu
INDF 00h — — —
TMR0 01h xxxx xxxx uuuu uuuu uuuu uuuu
PCL 02h 0000 0000 0000 0000 PC + 1
(2)
STATUS 03h 0001 1xxx 000q quuu
(3)
uuuq quuu
(3)
FSR 04h xxxx xxxx uuuu uuuu uuuu uuuu
PORTA 05h ---x xxxx ---u uuuu ---u uuuu
PORTB 06h xxxx xxxx uuuu uuuu uuuu uuuu
PORTC
(4)
06h xxxx xxxx uuuu uuuu uuuu uuuu
PCLATH 0Ah ---0 0000 ---0 0000 ---u uuuu
INTCON 0Bh 0000 000x 0000 000u uuuu uuuu
(1)
OPTION 81h 1111 1111 1111 1111 uuuu uuuu
TRISA 85h ---1 1111 ---1 1111 ---u uuuu
TRISB 86h 1111 1111 1111 1111 uuuu uuuu
TRISC
(4)
86h 1111 1111 1111 1111 uuuu uuuu
PCON 8Eh ---- --0- ---- --u- ---- --u-
Legend:
u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’, q = value depends on condition.
Note 1: One or more bits in INTCON will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt
vector (0004h).
3: See Table 6-5 for RESET value for specific condition.
4: PIC16C557 only.