Datasheet

 1996-2013 Microchip Technology Inc. Preliminary DS40143E-page 23
PIC16C55X
5.0 I/O PORTS
The PIC16C554 and PIC16C558 have two ports,
PORTA and PORTB. The PIC16C557 has three ports,
PORTA, PORTB and PORTC.
5.1 PORTA and TRISA Registers
PORTA is a 5-bit wide latch. RA4 is a Schmitt Trigger
input and an open-drain output. Port RA4 is multiplexed
with the T0CKI clock input. All other RA port pins have
Schmitt Trigger input levels and full CMOS output driv-
ers. All pins have data direction bits (TRIS registers)
which can configure these pins as input or output.
A '1' in the TRISA register puts the corresponding out-
put driver in a Hi-impedance mode. A '0' in the TRISA
register puts the contents of the output latch on the
selected pin(s).
Reading the PORTA register reads the status of the
pins, whereas writing to it will write to the port latch. All
write operations are read-modify-write operations. So a
write to a port implies that the port pins are first read,
then this value is modified and written to the port data
latch.
FIGURE 5-1: BLOCK DIAGRAM OF
PORT PINS RA<3:0>
FIGURE 5-2: BLOCK DIAGRAM OF RA4
PIN
Note 1: On RESET, the TRISA register is set to all
inputs.
Data
Bus
Q
D
Q
CK
QD
Q
CK
QD
EN
P
N
WR
PORTA
WR
TRISA
Data Latch
TRIS Latch
RD TRISA
RD PORTA
Schmitt
input
buffer
V
SS
VDD
I/O pin
Trigger
VSS
VDD
Data
bus
WR
PORTA
WR
TRISA
RD PORTA
Data Latch
TRISA Latch
RD TRISA
Schmitt
Trigger
input
buffer
N
V
SS
I/O pin
(1)
TMR0 clock input
QD
Q
CK
QD
Q
CK
EN
QD
EN
VSS