Datasheet

PIC16C505
DS40192D-page 8  1999-2012 Microchip Technology Inc.
FIGURE 3-1: PIC16C505 BLOCK DIAGRAM
Device Reset
Timer
Power-on
Reset
Watchdog
Timer
EPROM
Program
Memory
12
Data Bus
8
12
Program
Bus
Instruction reg
Program Counter
RAM
File
Registers
Direct Addr
5
RAM Addr
9
Addr MUX
Indirect
Addr
FSR reg
STATUS reg
MUX
ALU
W reg
Instruction
Decode &
Control
Timing
Generation
OSC1/CLKIN
OSC2
MCLR
VDD, VSS
Timer0
PORTB
8
8
RB4/OSC2/CLKOUT
RB3/MCLR/VPP
RB2
RB1
RB0
5-7
3
RB5/OSC1/CLKIN
STACK1
STACK2
1K x 12
7
2
b
y
t
e
s
Internal RC
OSC
PORTC
RC4
RC3
RC2
RC1
RC0
RC5/T0CKI