Datasheet
1999-2012 Microchip Technology Inc. DS40192D-page 41
PIC16C505
ADDWF Add W and f
Syntax: [
label
] ADDWF f,d
Operands: 0 f 31
d
Operation: (W) + (f) (dest)
Status Affected: C, DC, Z
Encoding:
0001 11df ffff
Description: Add the contents of the W register
and register 'f'. If 'd' is 0, the result
is stored in the W register. If 'd' is
'1', the result is stored back in reg-
ister 'f'.
Words: 1
Cycles: 1
Example:
ADDWF FSR, 0
Before Instruction
W = 0x17
FSR = 0xC2
After Instruction
W = 0xD9
FSR = 0xC2
ANDLW And literal with W
Syntax: [
label
] ANDLW k
Operands: 0 k 255
Operation: (W).AND. (k) (W)
Status Affected: Z
Encoding:
1110 kkkk kkkk
Description: The contents of the W register are
AND’ed with the eight-bit literal 'k'.
The result is placed in the W regis-
ter.
Words: 1
Cycles: 1
Example:
ANDLW 0x5F
Before Instruction
W= 0xA3
After Instruction
W = 0x03
ANDWF AND W with f
Syntax: [
label
] ANDWF f,d
Operands: 0 f 31
d
Operation: (W) .AND. (f) (dest)
Status Affected: Z
Encoding:
0001 01df ffff
Description: The contents of the W register are
AND’ed with register 'f'. If 'd' is 0, the
result is stored in the W register. If
'd' is '1', the result is stored back in
register 'f'.
Words: 1
Cycles: 1
Example:
ANDWF FSR, 1
Before Instruction
W = 0x17
FSR = 0xC2
After Instruction
W = 0x17
FSR = 0x02
BCF Bit Clear f
Syntax: [
label
] BCF f,b
Operands: 0 f 31
0 b 7
Operation: 0 (f<b>)
Status Affected: None
Encoding:
0100 bbbf ffff
Description: Bit 'b' in register 'f' is cleared.
Words: 1
Cycles: 1
Example:
BCF FLAG_REG, 7
Before Instruction
FLAG_REG = 0xC7
After Instruction
FLAG_REG = 0x47