Datasheet

PIC14000
DS40122B-page 78
Preliminary
 1996 Microchip Technology Inc.
Figure 10-6 shows a series resonant oscillator circuit.
This circuit is also designed to use the fundamental
frequency of the crystal. The inverter performs a
180-degree phase shift in a series resonant oscillator
circuit. The 330 k Ω resistors provide the negative
feedback to bias the inverters in their linear region.
FIGURE 10-6: EXTERNAL SERIES
RESONANT CRYSTAL
OSCILLATOR CIRCUIT
330kΩ
74AS04
74AS04
PIC14000
OSC1
To Other
Devices
XTAL
330kΩ
74AS04
0.1µF
10.3 Reset
The PIC14000 differentiates between various kinds of
reset:
• Power-on Reset (POR)
• MCLR
Reset during normal operation
• MCLR
Reset during SLEEP
• WDT Reset (normal operation)
Some registers are not affected in any reset condition;
their status is unknown on POR and unchanged in any
other reset. Most other registers are reset to a “reset
state” on Power-on Reset (POR), on the MCLR
and
WDT Reset, and on MCLR
Reset during SLEEP. They
are not affected by a WDT Wake-up, which is viewed
as the resumption of normal operation. The T
O and PD
bits are set or cleared differently in different reset situ-
ations as indicated in Table 10-3. These bits are used
in software to determine the nature of the reset. See
Table 10-5 for a full description of reset states of all reg-
isters.
A simplified block diagram of the on-chip reset circuit is
shown in Figure 10-7.
The devices all have a MCLR
noise filter in the MCLR
reset path. The filter will detect and ignore small pulses.
It should be noted that a WDT Reset does not drive
MCLR
pin low.
FIGURE 10-7: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
S
R
Q
External
Reset
MCLR
VDD
OSC1
WDT
Module
V
DD rise
detect
OST/PWRT
On-chip
(1)
RC OSC
WDT
Time-out
Power-on Reset
OST
10-bit Ripple counter
PWRT
Chip_Reset
10-bit Ripple counter
Enable OST
Enable PWRT
SLEEP
Note 1: This is a separate oscillator from the RC
oscillator of the CLKIN pin.