Datasheet

PIC14000
DS40122B-page 66
Preliminary
 1996 Microchip Technology Inc.
FIGURE 9-1: LEVEL-SHIFT NETWORKS
5 µA (nominal)
100 kΩ
To A/D mux,
RA1/AN1
SUM
External
Capacitor
(Optional)
(nominal)
*These switches are a matched pair
programmable
LSOFF
(SLPCON<4>)
VDD
Input Protection
Diodes
*
RD5/AN5
RA1/AN1 only
*
LSOFF
(SLPCON<4>)
ADZERO
(ADCON<0>)
reference
comparators
VDD
9.3 Slope Ref
erence Voltage Divider
The slope reference voltage divider circuit, consisting
of a buffer amplifier and resistor divider, is connected to
the internal bandgap reference producing two other
voltage references called SREFHI and SREFLO (see
Figure 9-2). SREFHI is nominally the same as the
bandgap voltage, 1.2V, and SREFLO is nominally
0.13V. These reference voltages are available on two
of the analog multiplexer channels. The A/D module
and firmware can measure the SREFHI and SREFLO
voltages, and in conjunction with the K
REF
and K
BG
cal-
ibration data correct for the A/D's offset and slope
errors. See AN624 for further details.
9.4 Internal
Temperature Sensor
The internal temperature sensor is connected to the
channel 7 input of the A/D converter. The sensor volt-
age is 1.05V nominal at 25 ° C and its temperature coef-
ficient is approximately 3.7mV/ ° C. The sensor voltage
at 25 ° C and the temperature coefficient values are
stored in the calibration space EPROM (See
Table 4-2). To enable the temperature sensor, the
TEMPOFF bit (SLPCON<1>) must be cleared.