Datasheet

PIC14000
DS40122B-page 46
Preliminary
 1996 Microchip Technology Inc.
When a master does not wish to relinquish the bus (by
generating a STOP condition), a repeated START (Sr)
must be generated. This condition is identical to the
START (SDA goes high-to-low while SCL is high), but
occurs after a data transfer acknowledge pulse (not the
bus-free state). This allows a master to send
“commands” to the slave and then receive the
requested information or to address a different slave
device. This sequence is shown in Figure 7-10.
FIGURE 7-8: MASTER - TRANSMITTER SEQUENCE
FIGURE 7-9: MASTER - RECEIVER SEQUENCE
FIGURE 7-10: COMBINED FORMAT
For 7-bit address:
S Slave Address R/W A DATA A DATA A/A P
"0" (write) data transferred
(n bytes - acknowledge)
A master transmitter addresses a slave receiver with a 
7-bit address. The transfer direction is not changed.
For 10-bit address:
S Slave Address
first 7 bits
R/W A1 Slave Address
second byte
A2
(write)
A master transmitter addresses a slave receiver with a 
10-bit address.
From master to slave
From slave to master
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
S = START condition
P = STOP condition
Data A Data PA/A
For 7-bit address:
S Slave Address R/W A DATA A DATA A P
(read) data transferred
(n bytes - acknowledge)
A master reads a slave immediately after the first byte.
For 10-bit address:
S Slave Address
first 7 bits
R/W A1 Slave Address
second byte
A2
(write)
A master transmitter addresses a slave receiver with a 
10-bit address.
From master to slave
From slave to master
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
S = START condition
P = STOP condition
Sr
Slave Address
first 7 bits
R/W A3 Data A Data
PA
(read)
S Slave Address R/W A DATA A/A
(read or write)
(n bytes + acknowledge)
Transfer direction of data and acknowledgement bits depends on R/W bits.
Combined Format:
S Slave Address
first 7 bits
R/W A Slave Address
second byte
A
(write)
Combined format -
From master to slave
From slave to master
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
S = START condition
P = STOP condition
Sr Slave Address
first 7 bits
R/W A Data A Data PA
(read)
Sr
Slave Address R/W A DATA A/A P
Sr = repeated 
START condition
Direction of transfer
may change at this point
Data A Data A/A
A master addresses a slave with a 10-bit address, then transmits
data to this slave and reads data from this slave.
(read)
(write)