Datasheet

 1996 Microchip Technology Inc.
Preliminary
DS40122B-page 43
PIC14000
FIGURE 7-3: I
2
CCON: I
2
C PORT CONTROL REGISTER
I
2
CM<3:0>: I
2
C mode select
0110 = I
2
C slave mode, 7-bit address
0111 = I
2
C slave mode, 10-bit address
1011 = I
2
C firmware controlled master mode (slave idle)
1110 = I
2
C slave mode, 7-bit address with start and stop bit interrupts
enabled
1111 = I
2
C slave mode, 10-bit address with start and stop bit interrupts
enabled
CKP: Clock polarity select
SCK release control
1 = Enable clock
0 = Holds clock low (clock stretch)
Note: Used to ensure data setup time
I
2
CEN: I
2
C enable
1 = Enables the serial port and configures SDA and SCL pins as serial
port pins. When enabled, these pins must be configured as input
0 = Disables serial port and configures these pins as I/O port pins
I
2
COV: Receive overflow flag
1 = A byte is received while the I
2
CBUF is still holding the previous
byte. I
2
COV is a don't care in transmit mode.
I
2
COV must be cleared in software.
WCOL: Write collision detect
1 = the I
2
CBUF register is written while it is still transmitting the previ-
ous word.
Must be cleared in software.
0 = No collision
bit0
bit7
R/W
I
2
CM3
R/W
I
2
CEN
R/W
CKP
R/W
I
2
CM2
R/W
I
2
CM1
R/W
I
2
CM0
R/W
I
2
COV
R/W
WCOL
Register: I
2
CCON
W: Writable bit
R: Readable bit
U: Unimplemented, read as ‘0’
Address: 14h
POR value: 00h
Any other combinations of I
2
CM<3:0>
are illegal and should NEVER be used.
or output.
0 = No overflow