Datasheet

 1996 Microchip Technology Inc.
Preliminary
DS40122B-page 33
PIC14000
FIGURE 5-10: BLOCK DIAGRAM OF PORTD<1:0> PINS
FIGURE 5-11: PORTD DATA REGISTER
Legend: U = unimplemented, read as ‘0’, x = unknown.
08h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
PORTD RD7/AN7 RD6/AN6 RD5/AN5 RD4/AN4 RD3/REFB RD2/CMPB RD1/SDAB RD0/SCLB
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
POR value xxh XXXX X X X X
Bit Name Function
B7 RD7/AN7
GPIO or analog input. Returns value on pin RD7/AN7 when used as a digital
input. When configured as an analog input, reads as ‘0’.
B6
RD6/AN6 GPIO or analog input. Returns value on pin RD6/AN6 when used as a digital
input. When configured as an analog input, reads as ‘0’.
B5 RD5/AN5
GPIO or analog input. This pin can connect to a level shift network. If
enabled, a +0.5V offset is added to the input voltage. When configured as
an analog input, reads as ‘0’.
B4
RD4/AN4 GPIO or analog input. Returns value on pin RD4/AN4 when used as a digital
input. When configured as an analog input, reads as ‘0’.
B3 RD3/REFB This pin can serve as a GPIO, or programmable reference B output.
B2 RD2/CMPB This pin can serve as a GPIO, or comparator B output.
B1 RD1/SDAB
Alternate synchronous serial data I/O for I
2
C interface enabled by setting
the I
2
CSEL bit in the MISC register. This pin can also serve as a general
purpose I/O. This pin has an N-channel pull-up to VDD which is disabled in
I
2
C mode.
B0 RD0/SCLB
Alternate synchronous serial clock for I
2
C interface, enabled by setting the
I
2
CSEL bit in the MISC register. This pin can also serve as a general pur-
pose I/O. This pin has an N-Channel pull-up to VDD which is disabled in I
2
C
mode.
D
Q
CK
Q
D
Q
CK
Q
D
Q
EN
Data
Bus
Write
PORTD
Write
TRISD
Read
TRISD
Read
PortD
Note: I/O pins have protection diodes to V
DD and VSS. These pins do not have a P-channel pull-up.
N
N
I/O
Pin
V
SS
VDD
Schmitt Trigger
Input Buffer
I
2
CCON<5>