Datasheet

PIC14000
DS40122B-page 20 Preliminary  1996 Microchip Technology Inc.
4.2.2.4 PIE1 REGISTER
This register contains the individual enable bits for the
Peripheral interrupts including A/D capture event, I
2
C
serial port, PORTC change and A/D capture timer
overflow, and external push button.
Note: INTCON<6> must be enabled to enable
any interrupt in PIE1.
FIGURE 4-6: PIE1 REGISTER
W: Writable
R: Readable
U: Unimplemented,
read as '0'
Register: PIE1
Address:
8Ch
POR value:
00h
R/W R R R/W R/W R/W R/W R/W
bit0
bit7
OVFIE: A/D Counter Overflow Interrupt Enable
1 = Enables A/D counter overflow interrupt
0 = Disables A/D counter overflow interrupt
ADCIE: A/D Capture Interrupt Enable
1 = A/D capture interrupt is enabled
0 = A/D capture interrupt is disabled
RCIE: PORTC Interrupt on change Enable
1 = Enables RCIF interrupt on pins, RC<7:4>
0 = Disables RCIF interrupt
I
2
CIE: I
2
C Port Interrupt Enable
1 = Enables I
2
CIF interrupt
0 = Disables I
2
CIF interrupt
PBIE: External Pushbutton Interrupt Enable
0 = Disable PBTN interrupt on OSC1/PBTN
1 = Enable PBTN (pushbutton) interrupt on OSC1/PBTN.
Unimplemented. Read as ‘0’
Unimplemented. Read as ‘0’
CMIE: Programmable Reference Comparator Interrupt Enable
1 = Enable programmable reference comparator trip
0 = Disable programmable reference comparator trip
CMIE
—
— PBIE I
2
CIE RCIE ADCIE OVFIE
(Note this interrupt not available in HS mode).