Datasheet

PIC14000
DS40122B-page 14
Preliminary
 1996 Microchip Technology Inc.
TABLE 4-2: CALIBRATION CONSTANT
ADDRESSES
4.2 Data Memor
y Organization
The data memory (Figure 4-2) is partitioned into two
banks which contain the general purpose registers and
the special function registers. Bank 0 is selected when
the RP0 bit in the STATUS register is cleared. Bank 1
is selected when the RP0 bit in the STATUS register is
set. Each bank extends up to 7Fh (128 bytes). The first
32 locations of each bank are reserved for the Special
Function Registers. Several Special Function
Registers are mapped in both Bank 0 and Bank 1. The
general purpose registers, implemented as static RAM,
are located from address 20h through 7Fh, and A0
through FF.
Address Data
0FC0h
K
REF
, exponent
0FC1h
K
REF
, mantissa high byte
0FC2h
K
REF
, mantissa middle byte
0FC3h
K
REF
, mantissa low byte
0FC4h
K
BG
, exponent
0FC5h
K
BG
, mantissa high byte
0FC6h
K
BG
, mantissa middle byte
0FC7h
K
BG
, mantissa low byte
0FC8h
V
THERM
, exponent
0FC9h
V
THERM
, mantissa high byte
0FCAh
V
THERM
, mantissa middle byte
0FCBh
V
THERM
, mantissa low byte
0FCCh
K
TC
, exponent
0FCDh
K
TC
, mantissa high byte
0FCEh
K
TC
, mantissa middle byte
0FCFh
K
TC
, mantissa low byte
0FD0h
F
OSC
, unsigned byte
0FD1h reserved
0FD2h
T
WDT
, unsigned byte
0FD3h -
0FF8h
reserved
0FF9h-Fh calibration space checksums
4.2.1 GENERAL PURPOSE REGISTER FILE
The register file is accessed either directly, or indirectly
through the file select register FSR (Section 4.4).
FIGURE 4-2: REGISTER FILE MAP
File Address
* Not a physical register.
Shaded areas are unimplemented memory locations,
read as ‘0’s.
00h Indirect add.(*) Indirect addr.(*) 80h
01h TMR0 OPTION 81h
02h PCL PCL 82h
03h STATUS STATUS 83h
04h FSR FSR 84h
05h PORTA TRISA 85h
06h
RESERVED RESERVED 86h
07h PORTC TRISC 87h
08h PORTD TRISD 88h
09h
89h
0Ah PCLATH PCLATH 8Ah
0Bh INTCON INTCON 8Bh
0Ch PIR1 PIE1 8Ch
0Dh
8Dh
0Eh ADTMRL PCON 8Eh
0Fh ADTMRH SLPCON 8Fh
10h
90h
11h
91h
12h
92h
13h
I
2
CBUF I
2
CADD
93h
14h
I
2
CCON I
2
CSTAT
94h
15h ADCAPL
95h
16h ADCAPH
96h
17h
97h
18h
98h
19h
99h
1Ah
9Ah
1Bh
PREFA 9Bh
1Ch
PREFB 9Ch
1Dh
CMCON 9Dh
1Eh
MISC 9Eh
1Fh ADCON0 ADCON1 9Fh
20h
General
Purpose
Register
(96 Bytes)
General
Purpose
Register
(96 Bytes)
A0h
7F FF