Datasheet
1996 Microchip Technology Inc. Preliminary DS40122B-page 113
PIC14000
FIGURE 13-3: CLKOUT AND I/O TIMING
TABLE 13-2: CLKOUT AND I/O TIMING REQUIREMENTS
Parameter
No.
Sym Characteristic Min Typ† Max Units Conditions
10
TosH2ckL OSC1↑ to CLKOUT↓ — 15 30 ns Note 1
11
TosH2ckH OSC1↑ to CLKOUT↑ — 15 30 ns Note 1
12
TckR CLKOUT rise time — 5 15 ns Note 1
13
TckF CLKOUT fall time — 5 15 ns Note 1
14
TckL2ioV CLKOUT ↓ to Port out valid — — 0.5T
CY+20 ns Note 1
15
TioV2ckH Port in valid before CLKOUT ↑ 0.25 T
CY+25 — — ns Note 1
16
TckH2ioI Port in hold after CLKOUT ↑ 0 — — ns Note 1
17
TosH2ioV OSC1↑ (Q1 cycle) to Port out valid — — 80 - 100 ns
18
TosH2ioI OSC1↑ (Q2 cycle) to Port input invalid
(I/O in hold time)
100 — — ns
19
TioV2osH Port input valid to OSC1↑ (I/O in setup
time)
0——ns
20
TioR Port output rise time — 10 25 ns
21
TioF Port output fall time — 10 25 ns
22††
Tinp PBTN pin high or low time 20 — — ns IN mode
only
23††
Trbp RC<7:4> change INT high or low time 20 — — ns
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only
and are not tested.
†† These parameters are asynchronous events not related to any internal clock edges.
Note 1: Measurements are taken in IN Mode where CLKOUT output is 4 x T
OSC
Note: Refer to Figure 13-2 for load conditions
OSC1
CLKOUT
I/O Pin
(input)
I/O Pin
(output)
Q4
Q1
Q2 Q3
10
13
14
17
20, 21
19
18
15
11
12
16
old value
new value