Information
PIC12(L)F1822/PIC16(L)F1823
DS80502E-page 2 2010-2012 Microchip Technology Inc.
TABLE 2: SILICON ISSUE SUMMARY
Module Feature
Item
Number
Issue Summary
Affected
Revisions
(1)
A6 A8 A9
Oscillator HS Oscillator 1.1 HS Oscillator min. V
DD.X
Oscillator HFINTOSC Ready/Stable
bit
1.2 Bits remained set to ‘1’ after
initial trigger.
XX
Oscillator Clock Switching 1.3 Clock switching can cause a
single corrupted instruction.
XX
Oscillator Oscillator Start-up Timer
(OST) bit
1.4 OST bit remains set. X X
ADC Analog-to-Digital Converter 2.1 ADC conversion does not
complete.
X
APFCON Remappable T1Gate 3.1 T1Gate is not remappable. X
Enhanced Capture Compare
PWM (ECCP)
Enhanced PWM 4.1 PWM 0% duty cycle direction
change.
X
Enhanced Capture Compare
PWM (ECCP)
Enhanced PWM 4.2 PWM 0% duty cycle port
steering.
X
Clock Switching OSTS Status Bit 5.1 Remains clear when 4xPLL
enabled.
XXX
Timer1 Gate T1Gate Toggle mode 6.1 T1Gate flip-flop does not
clear.
X
In-Circuit Serial Program-
ming™ (ICSP™)
Low-Voltage Programming 7.1 Bulk Erase not available with
LVP.
X
BOR Wake-up from Sleep 8.1 Device may BOR Reset when
waking-up from Sleep.
XX
Enhanced Universal Syn-
chronous Asynchronous
Receiver (EUSART)
16-Bit High-Speed
Asynchronous mode
9.1 Works improperly at
maximum rate.
XXX
Enhanced Universal Syn-
chronous Asynchronous
Receiver (EUSART)
Auto-Baud Detect 9.2 Auto-Baud Detect may store
incorrect count value in the
SPBRG registers.
XX
Note 1: Only those issues indicated in the last column apply to the current silicon revision.